• ADA4625-1 Crossover Distortion


    I am using the ADA4625-1 in a Digital to Analog Converter analog stage. I sometimes to like to use a current source to bias op amps into class a to reduce or eliminate crossover distortion. However, I noticed in the ada4625 datasheet that it says…

  • ADA4625: what does IVR parameter means?


    I'm not sure what does the IVR parameter of the ADA4625-1 part means. 

    Is this the same as input common mode range parameter often used in datasheets? If so, and the Vcm = 1.5 as stated above the table, does it mean that the all the table is…

  • ADA4625-1 application without the -VS


    i have used the wizards help to create a design using the ADA4625-1

    my question is - do not have an option for -VS on my board

    if i ground this pin would i get only half the amplification?

    how else would this effect my design?


  • RE: what is the current noise density vs frequency for the ADA4625

    Hi Gerard, 

    See below for the current noise density of the ADA4625:

    Let me know if you need anything else. 



  • JPEG Processing - 4:2:2 v 4:2:0?

    My JPEG saga continue...

    I am using a BF561 single core to compress a 640x480 YUV 4:2:2 image into JPEG format, employing the ADI JPEG Library tools.  I am getting very poor performance compared with the reference results from the Spec Sheet.  The Spec…

  • ADV7842 4:2:2 DDR mode, ADV7393: Stanag3350 support?  (2)

    Hello Dave,

    I am facing problems with replies to your answer, so I am oppening a new dicussion with the same title.

    Please clarify your answer regarding STANAG support:

    2) As I understand it, this is the same as RS-343A/EIA-343A and none of our parts…

  • LTC6804-2 and LTC6811-2 reference voltage 1 and 2 at 0V.


    I installed 2x LTC6811-2 and then 1x LTC6804-2 on the same board and I don't have any voltage reference output at anytime. The functional diagram in the datasheets shows that VREF1 should be always present as it's generated from V+. VREF2 is not…

  • RE: Clock distribution to 2 DDSs (9913) and 2 ADCs (AD7769)


    the AD9577 is a good choice if the 40 MHz clocks to the AD9913 may not be phase aligned to the 40 MHz clocks to the AD7769.

    The AD9577 has two PLLs that are not recommended to work at the same frequency because  the jitter performance is degraded …

  • 2*2 MIMO setup


    Iam interested in implementing a MIMO 2*2 scenario where i will use 2 fpgas (1 as the transmitter and 1 as the receiver) where each one  will be connected with one AD-FMCOMMS3-EBZ.
    So the setup will be :
    FPGA_1 + AD-FMCOMMS3-EBZ_1 =Base stati…

  • ADV7403 YUV 4:2:2?

    Can the ADV7403 output YUV 4:2:2 rather than YCbCr 4:2:2?