• ADA4571与ADA4571-2

    ADA4571-2Why is the ACCURACY of ADA4571-2 higher and how is it achieved? What is the difference between ADA4571-2 and ADA4571?

  • ADA4571 spec. clarification


    We have questions about ADA4571 as below,

    1) We used 'resolver' which is differential output to measure the angle. We want to try ADA4571 to replace the resolver, but the we are concerned about if the single-end output of ADA4571 bring greater noise…

  • ADA4571 Temperature data

    Hi every one. From data sheet, for converting raw data to 'C, I can't understand what is "TCvtemp" parameter.  

    So, what is "TC" value?


  • ADA4571 for PMSM motorcontrol sine commutation


    i have an ADA4571 GMR-Sensor with a 30 pole Magnetring (Off-Shaft integartion). The sensor works very well and the estimated angle is very accurate, but my question is, can i obtain a 360° mechanical angle with this build? I know that the ADA4571…

  • ADA4571软硬件连接时提示检测不到daughterboard,各位怎么看?


  • JPEG Processing - 4:2:2 v 4:2:0?

    My JPEG saga continue...

    I am using a BF561 single core to compress a 640x480 YUV 4:2:2 image into JPEG format, employing the ADI JPEG Library tools.  I am getting very poor performance compared with the reference results from the Spec Sheet.  The Spec…

  • ADV7842 4:2:2 DDR mode, ADV7393: Stanag3350 support?  (2)

    Hello Dave,

    I am facing problems with replies to your answer, so I am oppening a new dicussion with the same title.

    Please clarify your answer regarding STANAG support:

    2) As I understand it, this is the same as RS-343A/EIA-343A and none of our parts…

  • LTC6804-2 and LTC6811-2 reference voltage 1 and 2 at 0V.


    I installed 2x LTC6811-2 and then 1x LTC6804-2 on the same board and I don't have any voltage reference output at anytime. The functional diagram in the datasheets shows that VREF1 should be always present as it's generated from V+. VREF2 is not…

  • RE: Clock distribution to 2 DDSs (9913) and 2 ADCs (AD7769)


    the AD9577 is a good choice if the 40 MHz clocks to the AD9913 may not be phase aligned to the 40 MHz clocks to the AD7769.

    The AD9577 has two PLLs that are not recommended to work at the same frequency because  the jitter performance is degraded …

  • 2*2 MIMO setup


    Iam interested in implementing a MIMO 2*2 scenario where i will use 2 fpgas (1 as the transmitter and 1 as the receiver) where each one  will be connected with one AD-FMCOMMS3-EBZ.
    So the setup will be :
    FPGA_1 + AD-FMCOMMS3-EBZ_1 =Base stati…