• ADA4505 - Minimum output series resistor

    For op-amp type AD4505 what is the minimum output series resistor value necessary to drive any output capacitance.

    The loop gain set by feed back will be low - for example unity gain follower, or DC gain of 20 and low AC gain set by a feedback capacitor…

  • ADA4505 & AD8500 noise density vs frequency

    Hi

    Can you share the raw data of AD8500 and ADA4505 voltage noise density vs frequency chart?

    (Figure 24 of AD8500 datasheet and Figure 36 of ADA4505 datahseet)

    I'm building front end circiut using those parts and need those data for computing RMS…

  • Clock distribution to 2 DDSs (9913) and 2 ADCs (AD7769)

    Hi,

    I am goning to distribute a common 40 MHz clock to 2 DDSs and 2 ADCs. Will AD9577 work for this purpose? If not, do you have any suggestion?

    The ADC needs 5 V CLK and the DDS needs 1.8 V CLK.  

  • JPEG Processing - 4:2:2 v 4:2:0?

    My JPEG saga continue...

    I am using a BF561 single core to compress a 640x480 YUV 4:2:2 image into JPEG format, employing the ADI JPEG Library tools.  I am getting very poor performance compared with the reference results from the Spec Sheet.  The Spec…

  • ADV7842 4:2:2 DDR mode, ADV7393: Stanag3350 support?  (2)

    Hello Dave,

    I am facing problems with replies to your answer, so I am oppening a new dicussion with the same title.

    Please clarify your answer regarding STANAG support:

    2) As I understand it, this is the same as RS-343A/EIA-343A and none of our parts…

  • LTC6804-2 and LTC6811-2 reference voltage 1 and 2 at 0V.

    Hello,

    I installed 2x LTC6811-2 and then 1x LTC6804-2 on the same board and I don't have any voltage reference output at anytime. The functional diagram in the datasheets shows that VREF1 should be always present as it's generated from V+. VREF2 is not…

  • 2*2 MIMO setup

    Hello,

    Iam interested in implementing a MIMO 2*2 scenario where i will use 2 fpgas (1 as the transmitter and 1 as the receiver) where each one  will be connected with one AD-FMCOMMS3-EBZ.
    So the setup will be :
    FPGA_1 + AD-FMCOMMS3-EBZ_1 =Base stati…

  • ADV7403 YUV 4:2:2?

    Can the ADV7403 output YUV 4:2:2 rather than YCbCr 4:2:2?

    Thanks.

    Chris

  • 4:2:2 8bit ycrcb

    Hi,

    I have the EVAL-ADV7612-7511p video evaluation board .I'm using 7612 to receive  HDMI inputs from camera(720p @60) , and then feed to 7511 to output the video to the screen. 

    camera -> 7612 --> 7511 --> screen

    When adv7612 output 4:4:4 8bit ycrcb…

  • ADV7610 registers 4:2:2

    Hello

    Thanks in advance.

    I have a input video signal whose format is: YCbCr (Digital YUV) 20 bit (10 chroma + 10 luma).. 1080p60 (1920x1080 60 fps).

    As I can read in this forum ADV7610 only supports four modes for SDR 4:2:2:

                     - 8 bit SDR ITU-R BT.656…