• RE: LTC6811-2: where is the Parameters value for calculating pull up resister for I2C Master as LTC6811-2?

    External pull-up resistor calculations require the Input voltage low (Vil), Output Voltage low (Vol), and Output current low (Iol), Vcc = 5DC of the master I2C. where this value gets for calculations. 

    You can find the VIL for the GPIO Pins…

  • 关于在LT4363-2及LTC4364-2中的Retry Duty Cycle问题?


    在选择使用LT4363-2及LTC4364-2中有一个参数Retry Duty Cycle;

    关于Retry Duty Cycle,我的理解是:


    Retry Duty Cycle=T1/(T1+Tcool) * 100%

    LT4363-2:Less Than 1% Retry Duty Cycle During Faults, LT4363-2;

    LTC4364-2:0.1% Retry Duty Cycle…

  • Pluto - 2 Rx and 2 Tx using MATLAB


    I would like to setup the SDR Pluto to operate in 2 Tx and 2 Rx mode.

    I have followed the steps in the following video : https://www.youtube.com/watch?v=ph0Kv4SgSuI

    However, I am unsure how to setup and control the 2nd transmitter or receiver. 

  • ADV7611 YCbCr 4:2:2 SDR issue

    I am trying to configure ADV7611 to output 1280x1024 video in 16-bit SDR ITU-R BT.656 4:2:2 Mode 0.

    In free-run mode with blue background I get "0xFF00, 0x0000, 0xFF00, 0x0000..." pixel data, but it is 1280 LLC-period wide DE window between HSyncs…

  • RE: ADA4940-2, issue on creating 2 differential signals around 0V


    With a bit late, thanks for this suggestion.

    By applying -0.2V to R3, this circuits can convert 0 to 0.4V to a balanced -0.2 to 0.2V .

    It has been checked on the eval board.

  • ADA4096 not clamping input in unity gain buffer test circuit

    I'm testing the ADA4096-2 amplifier. The testing circuit is an unity gain buffer with a 30Hz sine signal, with dual +/- 3V supply, both amplifiers receive the same signal. I see the output is clamped correctly to the supply voltage values, however, as…

  • RE: LTC6804-2 VOV

    Thank you for your inquiry. I am looking into this and will get back to you as soon as possible.

  • RE: LTC6948-2 ,I can read from LTC6948-2,but I cant write in LTC6948-2 register.


    Are you using the LTC6948 eval board, FracNWizard, and DC2026 (USB to SPI board)?  Or are you trying to write to the part using your own software and hardware?  Can you send a plot of your SCLK, SDI and !CS signals, so I can look at the timing?

    To write…

  • A question regarding LTM4671 parallel 2+2 mode.

    Hi ADI support team. I use LTM4671 in my new design. The datasheet of this device is here: www.analog.com/.../LTM4671.pdf I wonder whether there are two mistakes in the figure2 of datasheet? For 2+2 parallel application, I think PHMODE0 must connect to…

  • ADF4372 Fs/2 and 3Fs/2 Clock Spurious

    Hello ADI Team,

    I am using ADF4372 PLL for generating Output Clock with frequency 12.288 GHz in Doubler path (RF16).

    PLL Settings:

    Reference input frequency is 409.6 MHz.

    PFD frequency = 307.2 MHz

    VCO Frequecny = 6.144GHz

    PLL Output Observation:

    I observed…