• AD9979 Package dye difference

    Hi, 

    We are using AD9979 for our CCD image sensor, Most recently we have procured a components from Digikey and Mouser. The Package of the AD9979 looks different. 

    I like to know is there any change in the package dye? 

    No information is provided in the…

  • AD9979 - CCD Noise issue

    Hi Team

    We are using an AD9979 as an analog front end for our CCD sensor. Right now we are getting more noise in the CCD signal. (Dark Noise)

    Right now we are processing a complete 14-bit Digital signal. 

    I have a doubt that. If we eliminate the lower…

  • AD9979 and spread spectrum crystal oscillator

    My customer is considering combining the AD9979 with a spread spectrum crystal oscillator.
    Spread Spectrum Crystal Oscillators are programmable.
    Customers are looking for a suitable setting for the AD9979.

    1) If you have any concerns or problems in using…

  • AD9979 Inhibited Region

    My customer has selected AD9979.
    We have a question about AD9979.


    The data sheet says "These specifications apply when H1POL, H2POL, RGPOL, and HLPOL are all set to 1 (default setting)" for the item "TIMING CORE SETTING RESTRICTIONS Inhibited Region for…

  • AD9979配置问题

    您好,我在使用你们公司ADI的一款芯片,AD9979,现在我按照说明书的上电顺序,配置芯片的寄存器,但是没有任何的输出,所以我想问下你们有没有例程可供参考,谢谢!

  • AD9979 IC testing

    I want to test the AD9979 IC by giving the 27MHZ sine wave signal as the input to CCDINP instead of CCD signal from the camera. Serial write is done as per data sheet (pg.no 36) example register settings for power up . CLI is given as 27MHZ signal . Then…

  • RE: 关于AD9979水平时钟信号的一个问题

    This question has been closed by the EZ team and is assumed answered.
  • AD9979 "delayed" clock

    Hello
    I read Datasheet of AD9979.
    I'm going to catch Dout in Clock output from GPOx simply.

    Why did you write with "derayed" in Clock output from GPOx?

    0 = delayed CLI.
    1 = delayed ADC output latch clock.
    2 = delayed SHD sample clock.
    3 = delayed…

  • AD9979驱动能力与干扰

    在使用AD9979+ICX694中,发现有两个问题,希望解答:

    1、部分AD9979芯片的数字输出(D0-D13)在水平消隐区存在干扰,在断开CCD模块的连接后该干扰仍然存在,是什么原因造成的?

    2、在官方提供的架构图(AD9979A_ICX655AQ Schematics)中,AD9979的水平驱动信号串联了33Ω电阻后接入CCD。我方的设计中HVDD未采用3.6V而使用了3.3V,在这种情况下水平驱动信号串联33Ω电阻后驱动ICX694芯片,是否会导致CCD水平驱动电压不足?