• Ad9959: Oscillator

    Is the ballon a t Pin 8 & 9 required when using an oscillator to drive the
    inputs or is the ballon just used to accommodate the mismatch of the external
    clock input impedance on the Eval-board?

     

    The Balun and the 50ohm resistor –these are…

  • AD9959: ADIsimDDS_spectrum

    Currently, we found the bandwidth of single tone output from frequency response
    in the ADIsimDDS tool is 800KHz. Pls see the attached. Is it all right for such
    wide bandwidth? Or is there something wrong with the software? Would you pls
    give some…

  • AD9959 evaluation board clock

    We are currently using an AD9959 DDS evaluation board. I am
    interested in clocking the system using the external quartz option.
    Could you please suggest an option for the quartz crystal?

     

    We do not recommend a specific manufacturer, but Ecliptek…

  • AD9959: FSK modulation performance

    I did an experiment of AD9959EVB. System Clock is 500MHz, FTW0 = 10MHz, FTW1 =
    10.1MHz, use P0 Pin to switch the DAC's output frequency.When the switching
    time is 20us, then the DDS's output is like Figure 1. If the switching time is

  • AD9959 - inputs to balun (available at output pins of AD9959)

    I'm using AD9959 in one of my application.

    1. In EVM Board schematic, DDS output pins 29 & 30 connected to 3rd & 1st pins of balun. Is the balun inpiuts can be swapped ? (i.e 29 th pin to 1st pin of balun and 30th pin to 3rd pin of balun). If we…

  • Simultaneous 2 frequency amplitude sweep using AD9959

    Hi,

    So I want to use my AD9959 DDS board to modulate the amplitude of 2 frequencies simultaneously.

    For e.g:

    Channel 1 output of the board would have output at 100 MHz with Amplitude factor 1.

    And Channel 2 output of the board would have output at 80 MHz…

  • Differential to single ended conversion techniques for AD9959

    The datasheet and the evaluation board both suggests using ADTT1-1+ balun from Mini Circuits for the differential to single ended conversion of AD9959's output channels.

    What are other solutions that I may employ? I was thinking about using an Op…

  • The AD9959's SYNC_CLK has no signal. What should I check to fix this?

    The AD9959's SYNC_CLK has no signal. What should I check to fix this?

     

    The SYNC_CLK should be running by default in crystal REF CLK mode or in any
    other REF CLK mode. However, the following three issues could be the problem.

    1) An invalid…

  • Is Data Valid Time (tDV) of 12nS for AD9959 correct? Or should it be 1.2nS instead?

    Data Valid Time (tDV) is indicated as 12ns minimum (refer to Table 25 On page
    31 of the AD9959 RevB data-sheet. This can't be true with respect to the fast
    5ns serial-data clock? Should it be 1.2ns instead?

     

    12nS is correct. This timing is…