• AD9957 spectral invert

    AD9957 works in QDUC mode with 5 MHz modulation rate.

    CFR1 = 00 20 00 02

    CFR2 = 00 40 E8 00

    CFR3 = 35 38 C1 28

    PROF0 = C9 FA 00 00 1C 2F 83 7B

    Input frequency (clk) = 50 MHz

    Output frequency = 110.1 MHz

    Pins 52, 53, 54 are electrically grounded…

  • AD9957 multichip sync

    I've got three AD9957 on my board. They are clocked from AD9520. Clock is 50 MHz. I made such topology of PCB as length of trace CLK1 is equal to length SyncIn1, CLK2 equal to SyncIn2 and so on. Placement of IC's as on attached picture. Difference of…

  • AD9957 Output

    Hi, I am using the AD9957. I use the Blackfin mode QDUC. On the Q-channel I send 0x8000 and on the I-channel 0x0000. There is no output signal. But if I swap the data to I-channel 0x8000 and Q-channel 0x000 there is carrier visible? This is wierd. Can…

  • AD9957 CCI_OVFL

    Hello,

           I am now working a AD9957 project. I used ADF4360-6 to provide 619MHz REF_CLOCK,  I do not use ad9957 internal PLL,  The sync_clk is OK. I test the single tone mode is right, But when I use QDUC MODE ,there is no signal. I found when I set the…

  • 关于AD9957

    你好,ADI专家:

          我目前项目需求为输出8路150M中频,各路需要同步(输出相位差能相参),杂散优于60dBc;数据来源为FPGA,IQ数据,数据时钟100M,基带带宽低于30M,,目前DAC时钟为外部提供的800MHz。   

          问题1:通过ADI官网选型发现AD9957接口设计比较简单,想要选用,不知道这个DAC可否满足我的需求,,,多片同步是否可以实现相参。。。。

          问题2:ADI是否有更好解决方案,如直接可以单片实现双通道(AD9957一路一片,功耗也高),更低功耗,,的DAC可以满足我的需要…

  • AD9957+ADF4351+ADL5801

    Hi, everyone!

    I use AD9957+ADF4351+ADL5801 in an up-conversion application. The AD9957 generates a 50 MHz intermediate frequency signal which is sent to the RF port of the ADL5801; The ADF4351 provides a  1700 MHz LO, and the ADL5801 mixes the two signals…

  • AD9957 DAC

    AD9957芯片中DAC_RSET手册中需要用1K欧姆的电阻下拉置地,由于个人前期设计的时候没有注意,把该信号直接接到FPGA管脚上,编译时给拉高了,我想问下这个时候是不是很容易就把芯片的DAC部分给烧坏???

  • AD9957 modulation questions

    I'm a microwave guy trying to figure out if I it makes more sense to use the AD9957 instead of a traditional Direct I/Q modulator.  I already plan a dual conversion solution so your app not AN-0996 makes sense to me.  The critical parameters that I…

  • DAC AD9957

    I am using AD9957 chip. I want to use it for the 200 MSPS data rate.

    I have applied 25 MHz of differential clock to as the REFCLK to the chip.

    In the SPI Register Map, I have enabled the PLL and I have chosen the VCO Band.

    But I am unable to find,…

  • AD9957 PLL

    Hi

             i am using 20 MHz external CLK for AD9957 PLL input, but it is not locking  for frequency 800 MHz.it gives a 20-30 MHz wide signal at pin no 55.  centered around 320 MHz.(pll loop filter BW=2.5 MHz,VCO=4)when i change the  VCO from 4 to 5,it results…