• RE: AD9912 DDS board

    Hi,

    Apologies for the late response. We can suggest the following steps to program the AD9912 evaluation board using LabVIEW:
    1. Look to the FX2LP website to access their SDK. https://www.cypress.com/documentation/development-kitsboards/cy3684-ez-usb-fx2lp…

  • AD9912

    请问AD9912可以用LVDS差分时钟吗?

  • AD9912

    AD9912 的参考输入可以是正弦波吗?

  • AD9912

    Is it possible to generate frequency ramp using AD9912?

  • AD9912

    hello sir,

    i want to know how to lock the clock frequency in AD9912 when we apply input clock

  • AD9912


    请问AD9912在改变频率的时候能不能只设置频率控制字寄存器,而不更新其他寄存器实现变频,希望能够尽快得到解答。

    谢谢!

  • AD9912

    On page 5 of the AD9912 datasheet, under "SYSTEM CLOCK INPUT/SYSCLK PLL Bypassed/Input Resistance" the range is specified as 2.4 to 2.9 kohms differential.  But on page 21, Figure 47 the schematic for "SYSCLK BYPASSES" shows a 500 ohm resistor…

  • AD9912: multichip synchronization

    I hope to synchronize 32 pcs AD9912. But when we test with only 2 pcs of
    AD9912, the difference of output phase are variable each time after power on. I
    disabled the  CLK multiplier and provided 1GHz clock external, the update
    clocks…
  • AD9912 IO-UPDATA

    AD9912的IO-UPDATA信号,用寄存器配置的话,那外部链接的IO-UPDATA是置高还是置零,我试过没控制起。

  • Multi-AD9912 power share

    Dear Sir or Madam 

    As mentioned in AD9912's datasheet , It's recommended to have a separate regulator to supply relative power  pins , for highest performance . Such as AVDD(PIN53) .

    The question is ,  if there are three AD9912s on board ,and the highest…