• AD9910: REFCLK termination 2

    igure 2 is three circuit options for LVDS termination. In the first circuit,
    the 100 ohm resistor is after the capacitor. But in our AD9910 datasheet, the
    100 ohm resistor is before the capacitor. Is this correct?

                                   Figure 1

                                  Figure 2



  • AD9910: output circuit clarification

    About the output circuit of the AD9910 eval board , after a deeper analysis,
    there are several inconsistencies and items that you may need to be aware of
    and I thought you'd find this discussion interesting and useful. I've

  • Question about AD9910 changing the output RF frequency?

    Hi, everybody. I use AD9910 and AOM to control the laser frequency. However, when I change the output frequency of AD9910 from one value to another value, there is a gap in the laser intensity which is collected by the photodiode. For example, in the attached…

  • AD9910: EVB R43 resistor value

    There is a question about the EVB of AD9910.
    Would you kindly tell me the function of the resistor in the circle.

    Is it used to do impedance match? If so, it should be 100ohm if the
    transmission line is 50ohm. Is this correct?
    I tested the VSWR…

  • AD9910: Programming through SPI-Interface

    When programming the AD9910 through the serial SPI interface can the ~CS line
    toggle between the instruction cycle and the data transfer cycle?


    I would not recommend it, the SDO and SDIO pins go to a high impedance state
    when the CS is high.…

  • AD9910 Evaluation board driver for Win7

    Can the AD9910 evaluation board to load/work under windows 7.


    Unfortunately, there's no immediate plans to update the AD9910 software for Win
    7, 64-bit mode.

    However,  if you have Win 7 (enterprize version) you can install an XP mode to

  • AD9910 - Sync CLK pin output not working


    I am using AD9910 with input clock of 50MHz and use the internal PLL to achieve a sys clk of 1GHz.

    However, I do not see a 250 MHz clock output on the AD9910 sync_clk pin. (This is used in FPGA)

    Could some one help me out? As I need the 250MHz…

  • AD9910 Nonlinearity


    I am using a designed PCB with 2 AD9910 DDS chips.

    I'm experiencing some peculiar behaviour at the output, so I want to ask some questions.

    I'm using a 1GHz sinusoidal clock.

    1. Am I supposed to get a mirrored signal at the unfiltered…

  • AD9910 amplitude VS temperature

    Hi, everyone, I have developed a PCB board with eight AD9910s. However, I have some problems which will be listed below. Would you please give me some help? Thanks in advance.

    1. The temperature of the AD9910 can reach up to 60°C when the frequency of the…
  • AD9910 Evaluation board CPLD source code

    Hello: I'm learning about the configuration and use of DDS recently. Can you provide the CPLD source program and the C language code of CY7C68013 on the AD9910 evaluation board?

    Thank you.