We reference the CN-0121 for synchronizing multiple AD9910, and met a question need your help.
When we got the synchronization signal from AD9910-A, AD9910-B and AD9910-C, then check register of "SYNC_SMP_ERR", AD9910-B and AD9910-C are…
Please be more specific.
How, exactly, is the FPGA controlling the AD9910? The AD9910 is a very flexible device and can operate in a number of different modes and configurations. Simply stating that an FPGA controls the AD9910 is rather vague.
We have a design using a 1GHz common clock to drive multiple AD9910s’ REF_CLK. The same 1GHz clock also goes to a clock divider chip (TI’s LMK04033) to generate phase aligned 250MHz, 125MHz and 62.5MHz. To synchronize multiple AD9910s, does AD9910…
Can you please send all your register settings? Else you could use the AD9910 software to enter the desired setttings and save the setup file and send the .stp file. Note, you do not need the AD9910 evaluation board to run the software. You can download…
I'm not sure about your specific application, but the AD9910 is our most flexible DDS. The AD9910 runs up to 1GSPS. The max output frequency is approximately 400MHz. The AD9910 Evaluation boards are available and the AD9910 software GUI is user…
Check out these documents.
AD9910 balun transformer
AD9910: output circuit clarification
Although these documents are for the AD9910, I think the same goes for the AD9911.
As a follow-on to Jeff Keip's response, the AD9957 and AD9910 use the same evaluation board template. However, the intent of the FIFO is to drive the AD9957 input, not the AD9910, which is problematic. The reason is the AD9957 expects 18-bit words…
The XTAL_SEL input on the AD9957 and AD9910 are identical, so DSB's posting with regard to the AD9957's XTAL_SEL pin applies to the AD9910, as well.
Hi, Are you using the AD9910 evaluation board and trying to program it externally?
Or is the AD9910 in your system?
The AD9957 has the equilvalent interface verses the AD9910. I don't have firmware for the AD9910 but the AD9957 is attached.