• RE: AD9866 /AD9865

    looking at figures 70, 71 and 72 in the datasheet, it seems to show frequencies close to dc

  • AD9866 Evaluation Board Resources

     Ad9866 have a evaluation board, i know it by ad9866 's datasheet. but i can't find the board 's resources in "analog.com". i want to know where it is. And i want to buy it,How to buy. thank you very much.

  • RE: RXSYNC is always low or high in ad9866

    Assumed answered offline.  Let us know if there are further questions.

  • RE: AD9866 PGA & SPI setting

    This question has been assumed as answered either offline via email or with a multi-part answer. This question has now been closed out. If you have an inquiry related to this topic please post a new question in the applicable product forum.

    Thank you,
  • RE: How to configure the AD9866 registers?

    This question has been assumed as answered either offline via email or with a multi-part answer. This question has now been closed out. If you have an inquiry related to this topic please post a new question in the applicable product forum.

    Thank you,
  • RE: 关于AD9866内部的低通滤波器问题

    This question has been closed by the EZ team and is assumed answered.
  • ad9866的RXSYNC没有输入信号(一直为高)

    现在调试AD9866,配置为full-duplex全双工模式,mode为高,config也为高,PWN为低,RESET_N为高,晶振时钟为25MHz,然后fpga接收到了时钟,rx_data也有值,但是RXSYNC一直为高。请问这大概是什么原因造成的,spi寄存器配置都没配,为默认值。

  • RE: Question for digital interface of AD9866 at half-duplex and master mode?

    This question has been assumed as answered either offline via email or with a multi-part answer. This question has now been closed out. If you have an inquiry related to this topic please post a new question in the applicable product forum.

    Thank you,
  • AD9866模数混合时钟连接问题!

    尊敬的adi专家:

    您好!

    在AD9866数据手册中第24页,Figure 51,Example of a Half-Duplex Digital Interface with AD9866 Serving as the Slave 图片如下:

    咨询的问题1是:CLKOUT不需要与OSCIN连接吗?

               问题2是:AD_CLK与RXCLK、OSCIN连接在一起,一路时钟分为两路,需要使用什么器件将一路时钟分为两路?

               问题3是:可以只连接ADC_CLK到RXCLK,CLKOUT到OSCIN…

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