• How to configure the AD9866 registers?

    I am using the AD9866 bidirectional DAC and ADC chip. And now I am encountering an issue that don't know how to configure the registers in the AD9866.

    Is there somebody can guide me the correct configuration or any instructions documents (I don't…

  • Question for digital interface of AD9866 at half-duplex and master mode?

      I am using AD9866. I have question about its digital interface when AD9866 is at half-duplex and master mode.

    the pin s of RXEN and TXEN are connected together with Bus_Ctr of ASIC. How can I identify TX or RX data path

    by ADIO[9:0].

                         minjertzeng 

  • AD9866 PGA & SPI setting

    Hello.

     

    I'll ask about Tx  setting of AD9866.

    In datasheet P20 Resister Map.

    ・MODE:1(Full-Duplex) ・CONFIG:0

    0x09 :Default setting is for hardware Rx gain code via PGA or Tx data port.

    0x0A :Default setting is for Tx gain code via SPI control…

  • RXSYNC is always low or high in ad9866

    I am testing the ad9866.But there is a question about RXSYNC.The ad9866 is configured as:mode=high(full-duplex),config=high,PWR_DWN=low,RESET=high.The spi is configured as default value(after  S/W Reset).I receive the RX data but RXSYNC is always low or…

  • AD9866模数混合时钟连接问题!

    尊敬的adi专家:

    您好!

    在AD9866数据手册中第24页,Figure 51,Example of a Half-Duplex Digital Interface with AD9866 Serving as the Slave 图片如下:

    咨询的问题1是:CLKOUT不需要与OSCIN连接吗?

               问题2是:AD_CLK与RXCLK、OSCIN连接在一起,一路时钟分为两路,需要使用什么器件将一路时钟分为两路?

               问题3是:可以只连接ADC_CLK到RXCLK,CLKOUT到OSCIN…

  • 关于AD9866内部的低通滤波器问题

    AD9866内部的DAC包含插值滤波器,ADC包含三阶可编程低通滤波器。

    请问这两个滤波器的相位特性是怎样的?是线性的吗?

    多谢各位啦

  • ad9866的RXSYNC没有输入信号(一直为高)

    现在调试AD9866,配置为full-duplex全双工模式,mode为高,config也为高,PWN为低,RESET_N为高,晶振时钟为25MHz,然后fpga接收到了时钟,rx_data也有值,但是RXSYNC一直为高。请问这大概是什么原因造成的,spi寄存器配置都没配,为默认值。

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