• AD9838 DDS power consumption

    Currently protoyping the AD9838 DDS device and require only one IOUT line,
    should the other IOUTB line be left open or tied directly to AGND or through
    200R? We're looking to minimise power consumption as this is a battery

  • Sinus Output of the AD9838


    I am using the AD9838 to generate a sinus-signal. The circuit on my board is the same as on the EVAL-AD9838.

    I expect a "clean" sinus wave but it has a spike in the positive half-wave (see picture)

    Does anyone has an idea what causes…

  • AD9838 Datasheet error: Absolute maximum ratings for AVDD to DVDD

    The datasheet states on the frontpage that avdd can be 5v while dvdd is 3V.
    Absolute max. Ratings state that avdd to dvdd should be -0.3V to 0.3v. Which is


    There is an error in the absolute maximum ratings, the -0.3V to 0.3v

  • About "SIGN BIT OUT" setting of AD9838


    I have a question about DDS AD9838.

    When SIGN BIT OUT is set to "DAC data MSB / 2",
    I am aware that the frequency will be doubled for the "DAC data MSB" setting.

    Is this correct?

    Best Regards,


  • RE: AD9838 DDS Amplitude adjustment

    We did manage to achieve a really nice ramp on the waveform by applying a PWM signal through a RC network to generate a linear ramp. Since we are working with 130dB of audio gain, we did have to add some tricky firmware to adjust the ramp to be non-linear…

  • AD9838 Datasheet change revision


    I have a question about the AD9838.

    In the link below, the absolute maximum rating notation of AVDD and DVDD is incorrect.
    The data sheet will be changed in the next revision.

    When will the datasheet revision change?


  • The internal comparator in the AD9838

     Let me ask you a question about the AD9838 built-in comparator.
    In the data sheet, VIN is the input terminal of the comparator.
    Is VIN a + input terminal? Or is it an input terminal?
    We look forward to your reply

  • A qustion about MCLK of AD9838


            In the datasheet of AD9838 I see that the max MCLK speed is 16MHz(B grade) and 5MHz(A grade), but the source of MCLK is not so fast and the speed is only 512Hz. So I want to ask that can the speed of MCLK slow as that speed? If it can slow…

  • 关于AD9838的MCLK问题


           我看AD9838的datasheet说这款DDS的MCLK最大为16MHz(B grade)和5MHz(A grade),但是我的MCLK时钟源没有那么大,只有32.768KHz。请问在这个频率下AD9838可否正常工作?(因为有些DDS在低于1MHz的时钟下就无法正常工作了)。另外我主要想关注的是,如果可以正常工作的话,他的分辨率是否会受到影响呢?