FAQ
Hi ,
I have a question with regards REFCLK specification.
We are using REFCLK of 112MHz and we are generating this from clock source that stabilizes to ±5×10^-6(±5ppm) after 2 min of power-up.
And we are setting the DAC before 2 min…
Hi,
We are facing some problems initializing the device and also looking to put the device in low power-down mode.
We are planning to use the reset to reinitialize if the 1st initialization fails.
I have checked the datasheet and could not find any information…
I'd like to use the AD9516 mounted on the EVB as the clock source for AD9788.
What is the requirements on reference clock input on J1 SMA connector? I'm using a 5MHz sinusoidal signal from an OCXO, but the PLL lock detect is not stable.
Is AD9516…
I have the evaluation board specified in the title. I can use "AD9788 SPI" and "AD9516 SPI" applications to control the two ICs AD9788 (TxDAC) and AD9516 (clock generator) mounted on the board.
However I couldn't understand if these…