• Balun at the output of AD9786

    Hi, 

    I would like to know why on the eval-board there is a 1:1 impedance ratio balun instead of 2:1 ratio at the output of the DAC AD9786. The output current is biased by the 100Ohm differential impedance, isn't it ? So we may need a 2:1 ratio to get 50Ohm…

  • AD9786: Reset timing

    For our application we are using the DAC AD9786 as a straight DAC, that is,
    with the default settings. We are not using the SPI interface either. We want,
    however, to Reset the DAC each time the system is reseted. For that we would
    like to know…

  • AD9786: Propagation delay

    What is the dependency of the propagation delay and settling time of the AD9786?

     

    Propogation delay is dependent on mostly digital filter configuration since
    each filter has its own group delay depending on #of taps (i.e. group delay=FIR
    Taps…

  • AD9786: Thermal pad connection

    1.) Pg 9 - Pin 2 is DNC
    Pg 47 - Pin 2 is labeled as LPF in the application circuit.

    2.) Pg 55 - Must the thermal pad be connected to AGND or DGND?

     

    1) DNC = Do Not Connect

    My guess is that figure 88, page 47 is a throwback to the fact that we…

  • AD9786: Current output voltage calculation

    I found a problem with one of my customers where AD9786 full scale output power
    under single tone test condition is only 3 dBm, much lower than the specified
    value 10dBm, so they would like to confirm if max. output power of AD9786 is
    able to…

  • RE: Basic configuration for DAC AD9786

    Hello,

    Assumed that his has been answered offline. Please let us know if this is not the case.

  • RE: AD9786 maximum analog output frequency

    the answer is "it depends"

    with max input datarate of 200MSPS, the max BW without aliasing is 100MHz. Minus the interpolation filter pass BW, which is typically 80%, assuming interpolation is used. 

    Note that, with Fdac=500MSPS, a 2x interpolation…

  • RE: Windows 7 64b support for AD9786 eval board

    This question has been assumed as answered either offline via email or with a multi-part answer. This question has now been closed out. If you have an inquiry related to this topic please post a new question in the applicable product forum.

    Thank you,
  • 关于AD9786镜像抑制的问题

    各位专家好!

           我在使用AD9786的过程中遇到一个问题,麻烦专家帮我解答下,谢谢!

          现象描述:     

           我要生成的模拟信号频率在100MHz至200MHz之间,为正弦波形式,由FPGA来提供数字信号。FPGA内部产生数字信号用的NCO工作时钟是200MHz(AD9786支持的输入数字速率最高为200MSPS),由FPGA内部的PLL给AD9786提供差分时钟200MHz,DATACLK也为200MHz(差分时钟的P、DATACLK与NCO的工作时钟为同一个时钟源),将AD9786设置为2倍内插模式…