• AD9783: read back value of the Hardware Version of the AD9783

    I am trying to read the Hardware
    Version of the AD9783 via SPI (register address 0x1F). I only get back zero.
    Writing and reading other registers works.
    Can 0 be the correct value for the hardware version?


    Yes , we never done a revision…
  • RE: AD9783 EVAL Set up


    Thanks for reaching out.

    We're currently updating the outdated product pages and user guides (since DPG2 is no longer in production) for some legacy DACs including that of AD9783.

    For testing the AD9783 eval board, you need to use the SDP-H1 as…

  • AD9783

    We plan to use an FPGA DDR interface to drive the AD9783. I assume that this is commonly done because of the speed as well as the fact that the interleaved data is clocked on both rising and falling edges of the clock. Can you provide information (possible…

  • AD9783 Settling time?

    What is the AD9783 settling time and are the specification / measurement conditions?



  • AD9783 theta JC

    Does anyone know the theta JC and/or theta JB thermal parameters for the AD9783.  The data sheet has the junction to air thermal impedance but not the theta JC or Theta JB values.  Our design is enclosed so there will be very little air flow over it and…

  • AD9783 BIST functionality


    Is there any documentation on the AD9783's BIST functionality?  I am testing out a board that has one of these DACs on it, and I was hoping to put it through its paces.  I saw the datasheet mentions the BIST, but unfortunately it doesn't say…

  • AD9783 noise

    I'm doing a design with the AD9783. It is not a waveform generation application, and noise is the most important parameter. I'd like to know how much noise I would see on the outputs at a constant DAC setting.

    I assume that there is one component…

  • AD9783 Thermal Problem


    We need your support for an issue with one of the DAC used in our design - AD9783.
    While evaluating AD9783 for our new TETRA Base Station Transmitter, we are experiencing certain thermal issues.
    The DAC is being driven by an FPGA in 16 bit parallel…

  • AD9783 Data Interface questions

    Does the AD9783 DAC family (AD9783,AD9781 and AD9780) LVDS interface support “dual-port" mode as suggested in the data sheet? Does the AD9783 LVDS inputs require external 100 ohm termination resistors?

  • AD9783 for new project


    We are intending to use AD9783 for our new TETRA base station application.

    Please suggest if it is active production (Recommended for new projects).

    I posted a few questions regarding this device and not getting any answers (link to the questions…