• AD9760 output constant

    I am attempting to use the AD9760 DAC to prototype a design. It is connected to a Spartan-3E FPGA which is providing the data bits and clock at 3.3V to the DAC circuit. I also have the analog voltage at 3.3V provided by a separate power supply. I'm measuring…

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  • Setup and hold timing in AD9670

    Hi,

    I am trying to interface the AD9760 with a FPGA, I need to constrain timing input.

    In datasheet, it talks about DCO to Data (Tsample/28 +/- 300ps).. 

    In worst case, I guessed that setup and hold time are Tdco/4 - 300ps. But it is not clear for us…

  • RE: AD9764 output

    Hi

    In the AN-420 application note about using the AD9764-EB Evaluation Board it is suggested to use C12,C13=22 pF and R20,R38=50 Ohm (as can be seen from the attached image).

    It is also said that :

    " OUTPUT CONFIGURATIONS

    Resistive Load

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