• AD9746

    Dear community,

    I am working with the DAC Ad9746 not eval. board, the DAC is mounted to a PCB.

    I use one another board to  write and read to the DAC via four wire SPI.

    I have read the data sheet to understand how to read and write to the DAC, but it seams…

  • EVAL-AD9746: data clock generation

    Hello,

    I use EVAL-AD9746 + AD-DAC-FMC-ADP + SDP-H1.

    I can't generate a vector (single tone as shown as example within UG-1624), because of the error message: "No data clock was detected"  

    On EVAL-AD9746, the PLL of AD9516, seems to be unlocked…

  • Using the AD9746 as independent 2 CH DAC

    Hello,

    My customer wants to know if the AD9746's two DACs can be used independently.

    When transmitting two real data, is it possible to transmit them independently to each DAC ?

    Thanks a lot.

  • RE: AD9746 DAC Output

    This question has been assumed as answered either offline via email or with a multi-part answer. This question has now been closed out. If you have an inquiry related to this topic please post a new question in the applicable product forum.

    Thank you,
  • RE: AD9746/9783: DAC analog signal peak power attenuation issues on AD9746/9783 Evaluation boards.

    Hi -

    The output of AD9746 and AD9783 is a current proportional to the input digital signal and the voltage reference, The evaluation board has 49.9 ohm load resistors that convert this differential current to a differential voltage. The load resistors…

  • RE: AD9746 + ADRF6755 found lots of harmonic of sample clk

    This question has been assumed as answered either offline via email or with a multi-part answer. This question has now been closed out. If you have an inquiry related to this topic please post a new question in the applicable product forum.

    Thank you,
  • Feasibility of LVPECL & LVDS CLK at AD9746

    Hello,

    My customer use AD9746 at their system and they should use LVPECL or LVDS CLK for this DAC.

    And they will use LVPECL clk source.

    Below are the voltage swing spec. of AD9746 clock input & clock sources.

    1. LVPECL:  0 to 2 V         (1.8VL - 2.2.VH…

  • AD9746 SFDR

    Hi

    I have a couple of questions about AD9746.
    Datasheet says that SFDR is 82, 70 and 66 dBc in the individual conditions.
    Do these values represent the specifications to 2nd/3rd harmonic distortion or not ?
    I wonder if these values represent the specifications…

  • No "Download" and "Play" buttons issue with AD9746-DPG2-EBZ in DPGDownloader.

    Dear Experts,

    My customer has just started evaluation of AD9746 EVM board with DPG2 board and found the following issue with DPGDownloader PC tool. Could you please help my customer to fix the following issue?

    1. Evaluation system:
    1) AD9746 EVM board…