我准备用AD9522-3产生的CMOS时钟作为ADRF6702的REFIN。 同时使用AD9743配合ADRF6702, 用于产生基带信号。想要请问一下，如果AD9743的CLK占空比不是50% （比如40%）， 对信号质量是否有影响？
Anybody have some data or a plot about clock' harmonics level at AD9743 I or Q output?
In my application I've a very high DAC clock's harmonic contents but I 've not identified the source of the issue.
I have a question about single-port mode of dual DAC.Could you show me the answer of following problem.
For example AD9741,AD9743,AD9745,AD9746,AD9747,In the case of using these dual DACs with single-port mode and only DAC1, how should I do IQSEL pin…
Thank you so much for your kind suggestion.
I am so sorry for my much late response due to my customer's late feedback.
When my customer did set the bit resolution for AD9746 to 16 bits in DPGDownloader PC software tool…
Mix-mode is referred in some ADI presentation. What does it mean?