• AD9742 Spice Model

          Dear all,

          I need to spice model of AD9742. I can find IBIS model but it isn't useful for me. Could you provide spice model of AD9742? Thanks in advance.

  • AD9742 output buffer


    I'm working with AD9742 DAC at 48Msps with full-scale output set to 20mA. Previously our design used 50ohm resistors as current-to-voltage converter followed by Op-Amp buffers. Currently we're exploring to feed the DAC output into Op-Amp summing junctions…

  • AD9742/AD9744 Exposed Pad

    Reading through the AD9742's datasheet I cannot find what the exposed pad
    should be tied to?


    The Exposed Thermal Pad must be soldered to copper pour on top surface of PCB
    for mechanical stability and must be electrically tied to…
  • AD9742 CLK+ input voltage


    It is a question concerning data sheet page 14 CLK INPUT(LFCSP Package) of AD9742.

    Single-ended clock input mode, CLK + input has been described as rail-to-rail.

    How many input voltage is rail-to-rail?

    (AVDD = 3.3 V, DVDD = 3.3 V, CLKVDD =…

  • AD9742 External voltage reference

    Am I correct i thinking that I cannot use an external voltage reference with an AD9742ACPZ as the REFLO signal is not available with this LFCSP_WQ package? Whereas the REFLO signal is available with the AD9742ARZ TSSOP package.

    My reason for wishing…

  • AD9742设置电流输出无效

    我在使用AD9742时使用的是datasheet 24图的连接方式,外部参考电压2.5V,但是当我将Rset从10k换成20k的时候,并没有发现输出电流的变化,后来将Rset处开路,电流也没变化,测试FS ADJ端的电压为2.5V,不知道问题出在哪里,请指教。

  • 关于AD9742时钟连接方式的问题


  • [征文] 求救!关于AD9742的无输出问题。

    500KHz,目前发现有输入,无输出。其它部分均按照数据手册来的,IOUTA、IOUTB接到T1-1T KK81 想得到电压输出。无论是在T1-1T

  • [AD9742]Could you teach MIN, TYP, and MAX at the shingle-end input?


    It is a question concerning data sheet page 5 CLK INPUTS(Table 3) of AD9742.

    Could you teach MIN, TYP, and MAX at the shingle-end input?

    Is it the same as Differential Voltage?

    (MIN:0.5Vpp and TYP:1.5Vpp)

    Thank you!

    Best regards.