I have made a design in which ADCLK846 is used as the synchronizing clock destribution IC between two AD9739s . It seems that the output to output skew of ADCLK846 (Max 65ps) is two large to synchronizing AD9739s . Because the sync controller of  the…

Dear Sir/Madam,

I am using teh EVB of AD9739, and wonder clarifying some puzzles

1. How does the AD9739 implement up-conversion,

2  whether the input signal of AD9739 shoule be real signal, could it be complex signal

3. whether or not AD9739 has integrated…

De ar:

  I use ADCLK925 provide clock to AD9739,but it can not drive AD9739 above 2.5G, it can drive AD9739 at lower frequency,i checked Datasheet and found the output is enough at 2.5G signal,below is my schematic diagram,could you help check the reason…

Hi!I am encountering a problem with AD9739.my system board with AD9739 is used to produce some waveforms,when ad9739 is clocked in 1G ,the board can get good signal(the output signal freq located  in the second Nyquist zone);while clocked in other  frequency…

AD9739 work at mix mode , can output RF signal,with center frenquency at 1.7GHz, and bandwidth = 300MHz? AD9739 Clk frequency is 2GSPS

thanks!

We are considering using the AD9739 on a project that will be prototyped on a Xilinx evaluation board.

Could you please find out if the AD9739 evaluation board can be used on a LPC (low pin count) FMC site?

最近在评估 AD9739， 但对其上变频功能有些疑问，请专家解答，谢谢！

1） AD9739 的上变频功能实现原理是什么？

2） 进入AD9739的信号是否必须是经过IQ正交调制后的，即必须是实信号而非IQ复信号？

3）AD9739之后是否需要加带通滤波，还是AD9739已包含？