My customer is planning to use AD9736 14bit High-Speed DAC for his new design. They want to use AD9736-DPG2-EBZ applied with Xilinx SoC ZC706 evaluation board (FMC connector) for their design investigation.
The description in ftp://ftp.analog.com/pub…
We are now want to use AD9736 into our products, but we need evaluate your DACs in system level
our test system structure is:
DPG3 => DSP interface => AD9736
so, my question is:
does DPG can work when not connect directly to AD9736 EVB?
Is there an app note for synchronizing two AD9736s?
Thank you Arik, that was very helpful.
Now that I have the data file loaded, there is still no output from the AD9736 Eval Board (I'm looking at the J2 output).
The DPGDownloader program is reading my clock input, and loads the vectors to the DPG3…
Could anyone tell what SNR has AD9736? Thanks.
My customer is planning to use AD9736 14bit High-Speed DAC for his new design. If we suggest AD9736-DPG2-EBZ applied with Xilinx SoC ZC706 evaluation board, my questions is..
The description in AD9736-DPG2-EBZ RevC Schematic.pdf shows LVDS interface…
In the figure 78 of the 9736's datasheet shouldn't the clock sampling signal delayed by MHD<3:0> bits? It is written as I've mentioned but I believe the figure is wrong.
With regard to the problem of high-speed DACs AD9736, sampling rate of 1.2GHz, inputting a 100MHz sine wave, extending the signals generated in the second Nyquist domain and the third Nyquist domain, how much is the SFDR and the IMD3…
Yes, the DPG2 can create such a signal. You would connect the DPG2 directly to the AD9736 eval board and would not need the FPGA.
One of my customer is planning to utilize AD9680 14bit High-Speed ADC and AD9736 14bit High-Speed DAC for his new design.
Prior to circuit design work, he is planing to make evaluation test by using their Evaluation Tools. For the ADC, I recommended…