• AD9717 has band of noise at different frequencies at I&Q outputs

    Taking an FFT of the I & Q channels of the AD9717 shows a spectrum of noise that shows up at different frequencies over different printed circuit boards. Noise components have been seen almost 125kHz away from each other, usually there are only a couple…

  • RE: AD911x output voltage conversion?

    Maybe the AD9717 is okay after all the way I'm using it now, see attachment. I'm using a fully diff opamp to get an output of 1.0 +/- 0.5 V with the OUTP and OUTN DAC outputs at a fixed 1.0 V and IOFS = 2 mA.  You think this is okay?

  • RE: Multi-Channel DAC

    Yes we do. We have an extensive portfolio of dual DACs with maximum speed from 125Msps to 1.25Gsps with resolution from 8 to 16 bits.We also have a quad DAC, AD9148, with the plan to develop further this line of products. Attached is a file describing…

  • RE: DAC Suggestion for UHF TX Chain

    The previous posting offered an RF DAC(AD9789 : 14Bit, 2400MSPS) could be considered as an alternative to a Baseband DAC & IQ Modulator(ADL5385) approach. For Baseband DAC and IQ Modulator approach, we would suggest either  AD9117/16 ( 20ma output…

  • RE: AD977XA Output Stage

    The DAC output likes to see a balanced output network. A differential output structure should be utilized along with a differential low noise amp if the goal is to achieve a low noise design. The differential output structure also helps surpress even…

  • RE: AD9117 FSADJI and FSADJI pin ...

    In most of our DACs we don't specify the I to Q gain match. Most of the gain match error is due to the low pass filters which typically are made with 10% components. On most of our DACs you have to use the SPI registers to configure the part so the typical…

  • RE: AD9117 boot up problems

    One clarification question, when you say you are doing the SPI reset high to low - do you mean you're writing it via the SPI or pulsing the RESET pin (pin 35)?

    This product family (along with the AD9707/6/5/4 and AD9717/6/5/4 families) do not have…

  • ADI公司解决方案通报—数模转换器IC


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  • RE: AD9715 latency

    There is information in the datasheet regarding making the timing deterministic. Please see the "Estimating the Overall DAC Pipeline Delay" section of the datasheet. There is a slight update in process needed for this section which I have copied and corrected…