how can I make the DAC latency known and deterministic?
I also need that the latency does not vary in time.
Thanks a lot.
I am developing an application based on AD9715, and I came across a strange problem: the real maximum sampling rate of the DAC is much lower than it is described in the datasheet.
Referencing to AD9715 Datasheet Rev. A, I make the DAC work in…
Thanks Larry, I missed the AD9715 in my parametric search. I was sorting on TxDAC under the features parameter but the AD9715 doesn't have that listed. It looks like a perfect fit for my application.
The AD9115 and AD9715 are 10 bit dual 125MSPS worth looking at.
Someone from the HDMI group needs to address the AD9883.
The AD971x daatsheet states that the internal CML resistor can be adjusted from 250 Ohm to 1 kOhm.
However, Figure 102 shows a variation from 300 to 1100 Ohm. Which one should I consider for the calculation of the output common model level?
Is it mandatory to write the 32 coefficients to device for the calibration to take effect?
What is the purpose of the CMLI and CMLQ pins on the AD9717 and AD9117 DAC famlies and where do they need to be connected?
Some high speed DAC have options for auto-calibration. Why and when should I use this option?