We are using the above part to drive a zero-IF IQ modulator that requires a DC bias of 1.15V. We have set the full scall current to 5mA (Radj = 6.4K). We have set the OTCM to 1V (from REFIO). We have a load resistance of 118 ohms. We are unable to achieve…
The AD9706 output is a current. The voltage at the output pins should be +/- 0.8V relative to OTCM.
I'm currently working on a low power chirp generator.
Someone before me working on this, used the AD9752 (12-Bit).
I would like to replace the DAC for an AD9706 (12-bit), on the output I'd like to use an
differential to single…
The AD9706 matches the precision and DAC update rate you desire, and is probably the closest we have to what you need. Its interface is a parallel CMOS interface.
Hi Andre -
Series terminators are a good idea for the AD9706 data input signals. Ideally they should be close to the signal source and have a value of 25 ohms.
Thanks, I agreed.
BTW, please let me additional inquiry.
In a datasheet of AD9705, there is resemble sentence "The AD9704/AD9705/AD9706/AD9707 approximately 5 μs to power back up, when 3.3 V AVDD is used."
Can I suppose that the max time…
We have a development card using 2 x AD9706 DACs to drive a zero-IF IQ modulator that requires a DC bias of 1.15V. We have set the full scale current to 5mA (Radj = 6.45K). We have set the OTCM to 0.5V, derived from a ADP223 Dual LDO. We have a load resistance…
Dear Mr. Deljones,
I am using the parallel input DAC (AD9706). My FPGA is giving a serial output which am converting to parallel digital inputs for the DAC using an intermediate De-Serializer. The de-serializer gives a clock output based on the frequency…