• ### RE: AD9706 Rset Value

For anyone else, I believe the math should give 16.4k, not 1.64k

(62.5*10^-6) = 1.025/Rset

Rset = 16.4k

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Thank you,

We are using the above part to drive a zero-IF IQ modulator that requires a DC bias of 1.15V. We have set the full scall current to 5mA (Radj = 6.4K). We have set the OTCM to 1V (from REFIO). We have a load resistance of 118 ohms. We are unable to achieve…

• ### AD9706 Output buffer question

Hello everyone,

I'm currently working on a low power chirp generator.

Someone before me working on this, used the AD9752 (12-Bit).

I would like to replace the DAC for an AD9706 (12-bit), on the output I'd like to use an

differential to single…

We have a development card using 2 x AD9706 DACs to drive a zero-IF IQ modulator that requires a DC bias of 1.15V. We have set the full scale current to 5mA (Radj = 6.45K). We have set the OTCM to 0.5V, derived from a ADP223 Dual LDO. We have a load resistance…

• ### RE: How to convert 12 bits Serial LVDS to parallel 12 bits for DAC interface?

Dear Mr. Deljones,

I am using the parallel input DAC (AD9706). My FPGA is giving a serial output which am converting to parallel digital inputs for the DAC using an intermediate De-Serializer. The de-serializer gives a clock output based on the frequency…

• ### AD970x - Internal Reference at Power Up

Regarding the note in the AD970x datasheet:

"The internal 1.0 V band gap reference may on occasion power up in a state that leaves the DAC output nonfunctional. To clear this state, power up again, and check that the voltage on the REFIO pin is within…