• AD970x - Internal Reference at Power Up

    Regarding the note in the AD970x datasheet:

    "The internal 1.0 V band gap reference may on occasion power up in a state that leaves the DAC output nonfunctional. To clear this state, power up again, and check that the voltage on the REFIO pin is within…

  • RE: Max time to power back from sleep mode of AD9740

    Thanks, I agreed.

    BTW, please let me additional inquiry.

    In a datasheet of AD9705, there is resemble sentence "The AD9704/AD9705/AD9706/AD9707 approximately 5 μs to power back up, when 3.3 V AVDD is used."

    Can I suppose that the max time…

  • RE: AD 9707 Power Supply

    In this circuit is the reset pin connected to the correct supply. In the EVAL board this pin is connected to the analog supply. My circuit uses a AD9705 with 3.3V Analog and 2.5 Digital supply.

  • AD9707 AVDD/DVDD/CVDD supply voltages

    Looking at the forum for hints on an issue I am having with a design, I found this message:

    https://ez.analog.com/message/216361?commentID=216361#comment-216361 

    I am troubleshooting a board where AD9707 is used and the designer supplied AVDD wit 3.3V…

  • RE: AD970x Clock Latency

    Hi Robert -

    The AD9705 does have a one clock cycle latency. Input data is first latched, then loaded into a register that drives the DAC core. The DAC does have an inherent pipeline delay.

    Thanks,

    Larry

  • TAGS LIST: Data Converters

    AD693
    AD5410
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    AD5735
    AD5755
    AD5755-1
    AD5737
    AD5757
    AD5421
    AD421
    AD5758
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    AD7868
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    AD5593R
    AD5592R
    AD5940
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    AD7293
    AD7294-2
    AD7292
    AD5590
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    L…
  • DAC Calibration

    Some high speed DAC have options for auto-calibration. Why and when should I use this option?

  • RE: 超声成像

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