• Can AD9694 support the simple 500[Msps] 14-bit Quad ADC operations with disabling any filtering function built-in AD9694?

    Dear all experts,

    My customer asked me about the following questions. Please advise me about your feedback on the following questions.

     

    Q1:

    Can my customer bypass all bandwidth limitation filters implemented in the DDC block of AD9694?

    Or

    Can my…

  • AD9694 CROSSTALK

    In datasheet on AD9694 (Page 7), the value of CROSSTALK is indicated only for the frequency of 155 MHz. Are there data from CROSSTALK on other frequences? I'm interested in the range 250-500 MHz.

  • RE: AD9694-500EBZ, 1GHz clock source compatibility with LVPECL, LVDS, or LVCMOS output termination

    the AD9694 datasheet explains the different modes of clocks supported. the ADS7-v2ebz J3 is a single ended input. 

  • AD9694 - JESD204B setup

    I'm trying to understand the AD9694 - according to the datasheet, "By default, the AD9694 is configured to use four converters and four lanes."

    However, it looks like that is *total* number of lanes, and that the device actually uses 2…

  • AD9694 Settling

    Hi, I'm running an AD9694 at 400MHz.  I'm testing the settling time with a flat top input.  I see behavior as shown in the attached images - the input to the AD9694 is flat, but the digitized output shows an overshoot and slow settling over a few…

  • AD9694 configuration

    I'm using AD9694 ADCs running at 400MHz connected to a Kintex 7.  I've found that every 30th time or so that the ADCs are configured, one or all four channels have corrupted data.  I believe I've corrected the problem by adding 5ms delays between…

  • Ad9694 VCM to ADL5205

    I would like to use a ADL5205 DC coupled to a AD9694. The default Vocm  of the ADL5205 is Vpos/2 = 1.65 V. The typical VCM for the input of the AD9694 is 1.34 so I intend to use VCM_AB & VCM_CD of the AD9694 to drive the VCM inputs of the ADL5205.

    The…

  • ad9694 input clock

    i'm going to use the AD9694, but i read that the minimum CLK input is 300 MHz, but i have a 240 MHz clock.

    how can i do?

    best regards

  • Question about ad9694

    I want to disable FACI function. I write data 0x56 into register 0x0571. But 0xfc has always been inserted into the data stream. 

    This is no effect at all.

    How can I disable FACI in ad9694

    Regards