• Does the AD9684 have any digital signal processing capabilities?

    Q 

    Does the AD9684 have any digital signal processing capabilities?

     

    A 

    Yes, the AD9684 is equipped with four wideband digital processors. A crossbar
    mux takes care of the data routing between the ADC and the DDC (Digital Down
    Converters). Each of these…

  • Can the AD9684 adjust timing between the two ADC channels?

    Q 

    Can the AD9684 adjust timing between the two ADC channels?

     

    A 

    Yes. The AD9684 has flexible timing delay adjustments.  The input clock divider
    inside the
    AD9684 provides phase delay in increments of ½ the input clock cycle. A fine
    delay feature…

  • AD9684-500EBZ interface to xilinx kc705

    I am working on project which I need to interface AD9684-500EBZ board to kc705.

    So far, I have developed the HDL code for Kc705 using microblaze PS and ad9684 IP provided by analoge devices github HDL library.

    I am intending to use NO-OS version.

    When…

  • What is the expected AC performance of the AD9684 at high input frequencies?

    Q 

    What is the expected AC performance of the AD9684 at high input frequencies?

     

    A 

    The AD9684 provides best in class AC performance for signals up to 2GHz. At
    frequencies above  1GHz, the input signal can be run at -3dBFS instead of
    -1dBFS to achieve…

  • AD9684: Mapping 4x real and complex channel voltage outputs for axi-ad9684-core-lpc

    I've currently implemented an AD9684 HDL hardware design and iio-oscilloscope shows the following two channels:

    Here is my ad9684-fmc.dtsi:

    /*
 * Analog Devices AD9684 FMC evaluation board.
 */
/ {
	clocks {
		ad9528_clk_out_0: clock@0 {
	…

  • RE: What is the maximum data rate of AD9684 when operating in parallel interleaved mode?

    I am also trying to configure AD9684 to support 500MSPS in parallel interleaved mode. 
    Data sheets don't explain how this mode can be configured.

    What I need is simply bypass all DDC processing and feed samples from both ADC channels straight to digital…

  • Questions about the AD9684 LVDS output

    My customer is using only one of AD9684's 2 ADCs, and I am trying to receive the received input as 2 DDCs. (Two carrier signals)

    The two DDCs will only be used in real.

    At this time, when using only real (I data) two DDC outputs, please inform us…

  • AD9684 PCB design guidelines

    Hi

    Please provide PCB design guidelines for AD9684 along with PCB stack up, Impedance, Thermal guidelines.

    Thank you

    mahi

  • AD9684 dtsi

    I've created an AD9684-FMC-500EBZ hardware design for the ZC706 evaluation board, based on the DAQ1 design, using HDL 2019_r1 branch.

    I've created and built the linux kernel and rootfs using petalinux-2019.2 workflow.

    However, when I boot the…

  • RE: AD9684 + HSC-ADC-EVALEZ with NI Labview

    unfortunately we do not have said tool. best way would be for you to use the AD9684 on a standard fpga dev kit and then do the automation.