• Clock Rate of AD9684

    Hi,

    We have bought EVK of AD9684, contarary to schematic the AD9684 doesnt have the VCO based Clock source mounted on PCB Assembly.

    We are trying to adop the EVK design , here we wish to use a equivalent Clock source

    unforutunately the part mentioned…

  • Power solution for AD9684

    Hi

    Below is the power solution proposed by ADI in datasheet AD9684

    I feel the solution is a little old, can power experts provide me a solution with better accuracies and better efficiency in similar lines, my VCC is 12V, so i feel i can tie ADP2370…

  • AD9684 heatsink requirement

    Hi,

    I need to know if AD9684 needs to have a heatsink attached on top of it?

    based on data sheet page 16 

    seems that if the airflow is 1 m/sec or 2.5 m/sec, there is o need for heatsink.

  • AD9684 decimation ratio

    Hi,

    I need to set decimation ratio to decimated by one but I can only set to 2, 4, 8 (I don't need 16).

    I have setup AD9684 registers as below to capture real signal only on 2 channels.

    chip application mode (register 0x200) = 0x22

    chip decimation ratio…

  • AD9684 Input termination

    What is the use for the variable input termination in AD9684? What are the
    options available?

     

    The AD9684 has programmable input terminations. This termination can be
    programmed using
    SPI register 0x016. Available options are 400Ù, 200Ù, 100Ù…

  • Latency of the AD9684

    What is the pipeline latency of the AD9684?

     

    The pipeline latency of the AD9684 is only 35 clock cycles.

  • Is the AD9684 an interleaved ADC?

    Is the AD9684 an interleaved ADC?

     

    No. The AD9684 is a fully pipelined ADC. So the customer does not have to worry
    about the interleaving spurs and frequency planning around it.

  • Can the AD9684 support DC coupled signals?

    Can the AD9684 support DC coupled signals?

     

    The AD9684 can support DC coupling if the common mode voltage is kept at the
    recommended  level. In DC-coupled applications, set the common-mode voltage to
    2.05 V, ±100 mV to ensure  proper ADC…

  • Handling High Voltage RF Swing before buffering to ADC AD9684

    Hi,

    I am a beginner in RF analog circuitry

    i have an optical fiber sensing application where the return optical signal is demodulated via optical demodulator and pushed out via RF output from a balanced hybrid reciever as discussed in 

    Product Datasheets…