• AD9683's  EVB problem

    Hi Sir ,

    I had tried to use AD9683's EVB and face to below problem , could you please give me advice to solve it?

    Xilinx platform:ZC706 (ISE 14.4)

    High speed ADC to FMC adapter : CVT-ADC-FMC-INTPZPCBZ(REB B)

    Thank you!

  • RE: HSC-ADC-EVALDZ and AD9683-250 EVAL Board

    Hi Robin,

    I believe the issue you are seeing is because there is no reference clock provided for the JESD204B link.  I updated the Wiki site to reflect this important piece of information.  Thank you for bringing this to our attention.  Jumper P504 should…

  • AD9683-250EBZ JESD204B Link Synchronisation

    Hello,

    I am trying to set up a JESD204B serial data link between the AD9683 (AD9683-250EBZ with FMC) and a Xilinx zc706 development board. I have created an SPI interface and am trying to use the AD9683's test pattern to debug the link. JESD204 IP blocks…

  • AD9683 JESD204B link is ready bit

    Hello everyone

    I am currently evaluating the AD9683 on a custom HW and have problems getting the data transmission going.

    The FPGA seems to not properly receive the data from the ADC or at least I am not able to interpret the incoming data stream. I…

  • Is there an additional data capture required in order to evaluate the AD9683?

    Is there an additional data capture required in order to evaluate the AD9683?

     

    Yes, it requires the high speed ADC data capture card called HSC-ADC-EVALDZ. 

    http://www.analog.com/en/analog-to-digital-converters/ad-converters/products…
  • AD9683的引脚如何与zynq 7015芯片中的 JESD204 ip核端口对应相连

    目前,我在设计中想使用ZYNQ 7015系列的FPGA,利用JESD204 IP核接收A/D转换器AD9683转换完成后的数据。但是JESD204 IP核的端口很多,我不知道应该如何将AD9683芯片上JESD204B协议对应的引脚(SYSREF、SYNCINB和SERDOUT)与ZYNQ7015芯片中的JESD204 IP核的端口对应相连。
  • What's so special about JESD204B? About Subclass 1?

    What’s so special about JESD204B? About Subclass 1?

     

    JESD204B is the latest iteration of the JEDEC JESD204 specification for SERDES
    transmission of high-speed data between mixed signal devices (such as ADCs and
    DACs) and digital processors…
  • Input Bandwidth and Nyquist Zone

    How high is the input bandwidth? Can I use the part in 2nd Nyquist zone?

     

    Most of the device’s AC parameters are characterized out to 220MHz in the
    specification table, and the TPC plots show typical performance out to 500MHz.
  • ad9680 with jesd204b interface

    Hello,

    I am trying to set up a JESD204B serial data link between the AD9680 (AD9683-1000EBZ with FMC) and a Xilinx K7serils board. I have created an SPI interface and am trying to use the AD9680's test pattern to debug the link. JESD204 IP blocks have…

  • RE: AD9683 - Two tone SFDR degrades as tone seperation gets closer in (10KHz). Thoughts?

    Hello,

    I attached narrowband 2-tone data around IF=185 MHz with CLK=250 MSPS.  Two RF generators were combined via high isolation power combiner and then filtered with 200 MHz LPF which was then connected to the EVB.

    Data does show IMD does gets better…