• AD9683

    does this have an integrated controller in it? if not, any recommendations?

  • Clock adjust AD9683-250EBZ


    I want to evaluate AD9683-250EBZ. Which parameters I have to consider to use the right Clock at this board?

    I want to use the full bandwith and resolution.

    Which Clock I have to connect? Sample Clock, Ref Clock or both?

  • How is the AD9683 unique?

    How is the AD9683 unique?


    Yes, the AD9683 is the only single channel ADC with 14-bit resolution that runs
    greater than 200MSPS (it runs up to 250MSPS) w/ JESD204B outputs. 
  • AD9683 SYNCINB inputs

    On p.40 of the datasheet, address 0x60 bit 4 is described as using the SYNCINB- pin when in single-ended CMOS mode. We mistakenly have connected to the SYNCINB+ pin, and have bypassed the SYNCINB- pin to ground. Will the part still work correctly in this…

  • AD9683's  EVB problem

    Hi Sir ,

    I had tried to use AD9683's EVB and face to below problem , could you please give me advice to solve it?

    Xilinx platform:ZC706 (ISE 14.4)

    High speed ADC to FMC adapter : CVT-ADC-FMC-INTPZPCBZ(REB B)

    Thank you!

  • AD9683-250EBZ JESD204B Link Synchronisation


    I am trying to set up a JESD204B serial data link between the AD9683 (AD9683-250EBZ with FMC) and a Xilinx zc706 development board. I have created an SPI interface and am trying to use the AD9683's test pattern to debug the link. JESD204 IP blocks…

  • AD9683 EVAL board FMC connector


    It seems to me that the FMC connector of the AD9683 are not according to the VITA 57 standard. The connector's connection seems to be flipped. Like A is actually K, B is actually J and so on. This is according to the AD9683 EVAL FMC schematic. I assume…

  • AD9683 SYNCINB inputs setup/hold time

    AD9683 SYNCINB inputs setup/hold time are not specified in datasheet. Are they not needed for operation in subclass0?

  • AD9683 JESD204B link is ready bit

    Hello everyone

    I am currently evaluating the AD9683 on a custom HW and have problems getting the data transmission going.

    The FPGA seems to not properly receive the data from the ADC or at least I am not able to interpret the incoming data stream. I…

  • Does the AD9683 support a smaller package size

    With fewer inputs, does the AD9683 support a smaller package size?


    Yes, the AD9683 is available in a 32-lead QFN (5mm2). Most competitive
    offerings are in 40-lead or larger packages.