about a mouth ago ,we brought an HSC-ADC-EVALDZ and EVAL-AD9681, but recent days, it sems broken.

          We follow the "Evaluation board for AD9278/AD9279 UG",  1. connect the boards to each other ;2. connect the two boards with each power…

  • AD9681 spurs in waveform - digital reset cannot solve everytime ?

    We use AD9681 8 channel with 125 MHz rate. Some channel sometimes have spurs in waveform like figure1 and sometimes perfect as figüre 2. We test all digital patterns and we get them correct always. We do digital reset(0x08->0x00, 0x08->0x03, 0x08->0x00…

  • Deserializing AD9681 LVDS Interface

    I'm using a FMC AD9681 Evaluation Board with a Genesys 2 (Kintex-7 XC7K325T-2FFG900C). I've got the SPI interface up and running, and I can successfully communicate with the ADC. Now I am trying to get the LVDS ADC Interface up and running, but I am…

  • RE: AD9681 PN9 and PN23

    This question has been closed by the EZ team and is assumed answered.
  • RE: Using MATLAB with HSC-ADC-EVALDZ and AD9681

    Hi Niqilulu,

    Indeed, 32bit Matlab is required for use with HSC-ADC-EVALCZ.


  • RE: Driver program for SPI of AD9681


    I am interested to get this sample code too. It seems it should attached in the sample design but I didn't find much info there. I also want to know how users could use the AD9681 eval board without the FPGA codes.

  • Revision check before purchasing an EVB of AD9681


    I want check the revision of AD9681-125EBZ.

    From the Wiki site of "Evaluating the AD9681 Analog-to-Digital Converter", I found below comment.

    There are two versions of the AD9681 evaluation board AD9681-125EBZ.

    The earlier version uses…

  • How to input LVDS signal at AD9681

    My customer use AD9681 and they should supply LVDS signal to AD9681 directly.

    So they need your help about how to implement input circuit of AD9681 for receiveing LVDS signals directly.

    1) Could AD9681 receive LVDS signal directly (without using additional…

  • Spurs in AD9681 Waveform

    I am using an AD9681 FMC Evaluation Board, with a Genesys 2 FPGA Board (XC7K325T-2FFG900C). I've gotten the xilinx XAPP 524 working on the board for receiving data, however I am running into an issue with the waveforms I am getting. The sine wave looks…

  • 关于AD9681输出赋值不满足LVDS电平要求问题