• Availablity of the AD9671 evaluation board

    Anybody know where I can source an AD9671 Evaluation Board? AD don't seem to provide them any more.

  • RE: Does AD9671 really support 4 channel/lane mode?

    Hi, do yo solve it ? I have the same problem with you ,could you help me if you solved it?Thank you

  • AD9671 based on DAQ2 and DAQ3 reference design

    Hi all

    I first posted this question in high-speed ADC forum, yet was adviced to try here as well.

    I'm trying to interface my fpga (ultrascale+) to some AD9675 chipsets (so JESD204b devices). 

    If I look at the example designs/projects, I get a bit confused…

  • Qisda: AD9671 evaluation with Xilinx KC705, Chipscope file?

    My customer, Qisda, is evaluating AD9671 with Xilinx KC705, they are using the guide from ADI Wiki:

    https://wiki.analog.com/resources/fpga/xilinx/interposer/ad9671

     

    They want to know if we can provide the Chipscope file for them (.ltx) ?

  • RE: EVAL-AD9671, EVAL-AD9670 - Extraction of Raw Frequency Data from Analog Front End module and its recommended Data Capture Board module

    Hi, yes VisualAnalog allows you to capture the raw ADC data. Check the time domain canvas and enable data capture to CSV file.

  • How to get a quote for AD9671 Eval Kit?

    Hi,

     

    I am interested in ordering AD9671 evaluation board (AD9671-EBZ). I don't see any online link for purchasing it.  Can someone please tell me whom to contact to get a quote. 

     

    Thanks

    Maruthi 

  • SPIController errors with HSC-ADC-EVALEZ and AD9671-EBZ target hardware

    Hi

    Followed the installation process for VisualAnalog and SPIController then connected my target hardware (HSC-ADC-EVALEZ and AD9671-EBZ) via USB which seems to install the correct drivers according to the Device Manager:

    However starting SPIController…

  • AD9671 with FPGA JESD204B IP has linked done,but sample data is always 0.

    AD9671 with FPGA JESD204B IP has linked done,but sample data is always 0.Then I set regsiter 0x11A to 0xFF to use test mode(sine wave).after setting,input data in FPGA is 0.there is no change.I don't know why.

  • Is the AD9671 Evaluation Board, ADC-FMC Interposer & Xilinx KC705 Reference Design also Compatible with AC701?

    Hello,

    I see the KC705/VC707/ZC702 listed as compatible platforms for the AD9671 reference design.  Is the AC701 platform also compatible? 

    Thanks,

    Gina

  • Dear sirs! Is it possible to get IBIS models for AD9671 clock, sysref and syncinb inputs

    Dear sirs! Is it possible to get IBIS models for AD9671 clock, sysref and syncinb inputs ?