• AD9670

    Hello team,

    I'm looking forward to design an ultrasound imaging system using phased array transducers(preferably 2D). I need to figure out the best AFE design for my need. I assume that AD9670  + HSC-ADC-EVALCZ Data Capture Board

    would be suitable…

  • AD9670 Full Datasheet

    Hi,

    I was hoping to use the AD9670 for my honors project, how can I get access to the full datasheet?

    Cheers,

    Josh

  • ad9670 current consumption

    On the AD9670 data sheet, page 6, the current consumption for some of the rails is specified as:

    IAVDD1, TGC mode, LO band mode: 148/187/223/291 mA

    Under what conditions is the current consumption 148mA, and what conditions would cause it to be 291mA…

  • AD9670

    To Whom it May Concern,

     

    Question regarding the low pass filter frequency.  On preliminary documentation, the low pass filter was supposed to go as high as 26MHz at 80MHz clock.  The SP0 version datasheet now shows a number of frequencies “Out of tunable…

  • AD9670

    What is the reason for the having the demodulator after the ADC in the functional block diagram?

  • AD9670 reference design

    Hello !

    I want to buy AD9670 Evaluation Board (AD9670EBZ), so I'd like to know have you got a reference design for it,

    same as for AD9671 Evaluation Board, but using Serial LVDS to connect with FPGA ?

    Thanks,

    Maksim Koptev 

  • AD9670 data out stream

    Dear All

    I have a problem to correct configure tha AD9670.

    If I configure the FCO in "continous mode", the FCO and the DCO signal go out correctly but the data(DOUT) are always zero. Istead if I configure FCO "only during burst" the DCO signal go out…

  • AD9670+HSC-ADC-EVALCZ

    用SPIController可以识别到HSC-ADC-EVALCZ采集板,但是识别不到AD9670评估板,有没有大佬能给予一点指导,不胜感激!

  • About  AD9670 Evaluation Boad

    Hi,

    I would like to use AD9670.

    So, I have some questions.

    #1  What is the purpose of the EXTERNAL SYNC pin of the capture board (HSC_ADC_EVALZC)?

    #2  Is data output correct as it is output from 16 data output pins of FPGA?

    #3  When sending the signal…

  • ad9670 DC offset

    Hello,

    I would like to know the good configuration to cancel the DC offset after the ADC (in numeric part). 

    I try this with no effect. I always have an offset between (-20 and -10 (decimal)).

    I sent  0x0000 (reset) and just next tap 0x0001 (set on)…