• hdl for ad9655

    I am working with ad9655 now. I wonder where to find some simple FPGA source code of HSC-ADC-EVALCZ High speed for AD9655? Can some one help me?

  • AD9655 Vin+/- range


    Can you tell us the max and min value in Vp for Vinx+ or Vinx- and a common mode value with Vref = 1,4V for AD9655 because it is not clear in the datasheet?

    Also, do you have a newer datasheet (more recent that Rev. 0)?

    Thank you in advance.

  • AD9655 interfacing and external triggering

    For a past project I used an AD9230 evaluation board with the HSC-ADC-EVALC interface board.

    Now I'm moving to a 2-channel design and I was thinking to use the AD9655.

    Is is possible to use it with the same interface board?

    Since I needed external…

  • Query about AD9655 evaluation

    Hi, there

    I want to evaluate the performance of AD9655 with its EVB. AD9655 is 16-bit ADC. But I find most of RF signal generators from Keysight or R&S are 14-bit or less. Could these RF signal generators be used as analog input signal generation for…

  • AD9655 multiple chips Synchronization


    Currently, we have interfaced a single chip ADC AD9655 to an FPGA Multi Gigabit Transceiver RX lane (with quad deserializer pair and one ref clk) and we obtain good result.

    A question is how to synchronize multiple chip AD9655 in order to use MGT…

  • AD9655 Anlog input interface through Transformers


       I Have some queries regarding AD9655 Evaluation schematics ,Please clarify the below queries.

       1. Evaluation schematic inputs connected only Ain+ why?

       2. If i am getting signal from  Board. using Differential driver i have to use AIN+ and AIN-or i…

  • Nonlinearity determination of AD9655



    I’m trying to determine the non linearity of the ADC AD9655 with the “histogram” method. Although the achieved results are in the range of the data sheet descriptions, something looks wrong. Instead of a straight DNL trend, I got a "sine wave"…

  • AD9655 Eval Board, Input and FMC

    1. Having trouble connecting the eval board to an Altera Sockit eval board (using an Altera FMC to HSMC interposer board). Does the AD9655 board fully comply with FMC?
    2. The analog inputs are either transformer or AC coupled but the customer needs to…
  • AD9655 HDL code and synthesized clock for multiple ADCs


    Presently I'm developing a data acquisition using AD9655 ADC. I'm using AD9517-4 for ADC clock. I'm planning to use kintex-7, KC705 evaluation kit for interfacing.  Please give some reference VHDL code.

    2. I'm also planning for a 16…

  • how do I know if an ADC is suitable for IF sampling, i.e AD9653 or AD9655?

    I have some question on determining the IF sampling capability of ADC's :

    I've checked the ADCs selection table for ADC > 10MSPS

    • some ADC datasheets explicitly mention that the device is suitable for IF sampling, i.e : AD9461, LTC2195, ..…