• ad9648 can't start work

    we used two pieces of ad9648 on our project .

    the problem is that there is a certain probability that ad9648 can‘t start work,for example,you boot it 100 times, 20 times the ad9648 wouldn't start work.

     

    the FPGA give the differencial clock to the…

  • RE: Spur output from AD9648

    Hi,

    Thank you for using AD9648. You mention that your signal is a single-ended analog signal. Is this being converted to differential before it reaches the AD9648 inputs? As stated in the datasheet, "SFDR and distortion performance degrade" with a signal…

  • AD9648 Evaluation Board Documentation

    Dear ADI Support Friends,

    I'm a ADI DFAE, recently we have promoted AD9648 to our customer, but the customer wished we can supply AD9648 EVB documentation, could you help us to confirm if ADI can supply AD9648 EVB documentation to the customer? if yes…

  • ADL5387 I/Q Filter Issue

    I use ADL5387 and AD9648 to design RF system , but I have some question that ADL5387 I/Q output filter into AD9648 between have 500 Ohm resistor , if I connect the AD9648 VCM pin fin to 500 Onm resistor ( become 250 Ohm and 250 Ohm between add VCM voltage…

  • AD9648 sometimes has no output on DCO and DATA pins,Input clock always exists

    Hello,

    In our current design, after multiple power ON/OFF, we face the issue that sometimes (~15%) we get the following situation:

    • AD9648 does not provide a valid output clock. (But input clock is always OK)
    • AD9648 is no more resettable with digital…
  • AD9648 goes in deadlock state at initialization

    Hello,

     

    In our current design, after multiple power ON/OFF, we face the issue that sometimes (~5%) we get the following situation:

     

    • AD9648 does not provide a valid output clock. (But input clock (based on DDS) is always OK)
    • AD9648 is no more…
  • AD9648 randomly enters unrecoverable broken state at power-up.

    Hi,

    the AD9648 that we use in our design randomly fail to power-up correctly.  This seems to depend on order of power up of analog and digital voltages vs. powering up the VCXO that feeds the AD9648's clock.  Unfortunately the data sheet does not document…

  • RE: AD9648 Slave Registers

    Hello Dave,

    Thanks for contacting Engineer Zone regarding the AD9648. The AD9648 does not use the transfer register for most registers, but one. This is the Sample Rate Override register 0x100. The description of this register can be found in page 39…

  • AD9648 - DCO clock at startup

    We are experiencing an issue that happens quite infrequently (once every few hundred to maybe a thousand power ON cycles) but when it does - the DCO clock coming from the AD9648 is missing (stuck HIGH). The input clock is fed by a Silabs programmable…

  • RE: Query about AD9648 with VisualAnalog

    Hi Wayne,

    Thank you for evaluating the AD9648.

    Here is my understanding regarding the "Enable Weighting" check box in the VisualAnalog Input Formatter block. The AD9648 is a 14 bit converter. As such, it will have 2^14 = 16k output codes. A full scale…