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  • RE: AD9645 : usage of S-Parameter file

    UmeshJ
    UmeshJ

    yes. they are fixed.

    • 1 month ago
    • High-Speed ADCs
    • Q&A
  • AD9645 Evaluation Board

    analog-archivist
    analog-archivist

    Q 

    Is there an evaluation board for the AD9645?

     

    A 

    The evaluation board for the AD9645 actually supports the entire family, which
    ranges from
    80 MSPS to 125 MSPS, and from 12-bit to 14-bit.  The 12-bit pin-compatible
    device is called the…
    • over 2 years ago
    • High-Speed ADCs
    • Documents
  • Synchronize multiple AD9645

    Charles Steinkuehler
    Charles Steinkuehler

    I have a design that uses dual AD9645s.  Currently they are both clocked with a 1x sample rate clock, so they stay synchronized.

    We would like to test with a higher speed reference clock, but I am concerned that once we use the internal clock divider the…

    • over 1 year ago
    • High-Speed ADCs
    • Q&A
  • AD9645 Highest Input Clock Frequency

    analog-archivist
    analog-archivist

    Q 

    What is the highest input clock frequency supported by the AD9645 family?

     

    A 

    The maximum input clock frequency is 1 GSPS but the maximum sampling rate is
    125Msps.  The AD9645 family supports a clock divider function (up to divide by
    8)…
    • over 2 years ago
    • High-Speed ADCs
    • Documents
  • AD9645 Reduction in Power Consumption

    analog-archivist
    analog-archivist

    Q 

    Is there the ability to further reduce the power consumption of the AD9645?

     

    A 

    Yes, by means of configuring the device via the serial port control.  There are
    two LVDS output swing levels supported, so depending on the trace length, the
    …
    • over 2 years ago
    • High-Speed ADCs
    • Documents
  • AD9645 in a 5mm x 5mm 32-lead package

    analog-archivist
    analog-archivist

    Q 

    How is the AD9645 residing in a small 5mm x 5mm 32-lead package?

     

    A 

    The AD9645 family output data interface consists of 2 serial LVDS lanes per ADC
    channel.  This reduces the number of traces required to the receiving FPGA (or
    asic).  A…
    • over 2 years ago
    • High-Speed ADCs
    • Documents
  • Recommended ADC driver and clock distribution devices for the AD9645

    analog-archivist
    analog-archivist

    Q 

    What are the recommended ADC driver and clock distribution devices?

     

    A 

    Companion products are dependent on the configuration of the signal chain.  For
    differential RF or IF paths, we recommend the ultra-low distortion ADL5562
    amplifier…
    • over 2 years ago
    • High-Speed ADCs
    • Documents
  • RE: I want to run an AD9645 at 93MHz period. Can I get away without SPI and is there VHDL code?

    DougI
    DougI

    Hi Frank,

    Thanks for considering the AD9645. The AD9645 works in a default mode without SPI commands. If you keep CSB high the SPI port is disabled.

    If you use AD9645 in non-SPI mode, please be sure to comply with the instructions in the POWER AND GROUND…

    • over 3 years ago
    • High-Speed ADCs
    • Q&A
  • RE: need suggestion for thermal sensor ADC

    DougI
    DougI

    Hi Ken,

    Thanks for your interest in ADI ADCs. Is a dual (2 channel) device sufficient? If so, please review the AD9645 ( www.analog.com/.../ad9645.html ).

    Thank you.

    Doug

    • 8 months ago
    • High-Speed ADCs
    • Q&A
  • RE: "signal connection relating CVT-ADC-FMC-INTPZB"

    DougI
    DougI

    Hi Okamoto-san,

    Thank you for working with the AD9645.

    Your understanding for Point #1 is correct. The CVT-ADC-FMC-INTPZB is not compatible as-is with the AD9645 evaluation board. Fortunately there is a relatively easy fix, if you do not mind doing…

    • over 4 years ago
    • High-Speed ADCs
    • Q&A
>
 
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