• AD9635 Clocking

    The clock for an AD9635 is from an FPGA PLL in LVDS. In this case, can I directly connect the PLL clock outputs to the clock inputs of AD9635 with capacitors and resistors without using a clock buffer such as AD951x in Fig 60 on page 22  of AD9635 data…

  • RE: AD9635 SNR with 1Vpp input span

    Hi Sberla,

    Thank you for your interest in AD9635.

    AD9635 Register 0x18 Bits[2:0] does a digital scaling so that a smaller input swing results in a full-scale output.

    The AD9635 datasheet SNR numbers are based on a full-scale input swing of 2Vpp_differential…

  • Clock interface of AD9635

    The clock for an AD9635 is from an FPGA PLL in LVDS. In this case, can I directly connect the PLL clock outputs to the clock inputs of AD9635 with capacitors and resistors without using a clock buffer such as AD951x in Fig 60 on page 22 of AD9635 data…

  • Does the AD9625 JESD204B lane rate have margin on 6.5Gbps?

    Our application is SERDES limited, and needs to operate on the fewest lanes possible. Could the AD9635 lane rate be pushed 2.5% to 6.665Gbps?

  • RE: Serializing the parallel output of the AD9231

    Hi,

    I'm not aware of an Analog Devices part to serialize the AD9231 outputs. We have a dual 12bit ADC with serial outputs (AD9635) if that is of interest.

    Thanks,

    Doug

  • Comment on HSC-ADC-EVALCZ: Can I get source code for FPGA on High Speed ADC evaluation board?

    Hi,

    Do you have the FPGA source code of HSC-ADC-EVALCZ High speed for AD9655 / AD9645 or AD9635?

    Thank you.

  • AD9635 power-up time

    Hi,

    which is time needed to have the AD9635 up and running after power supply has been applied?

    I'm not sure I can consider the value indicated for the "Wake-Up Time (Power-Down)" stated in the datasheet.

    thanks

    Regards,

    Alberto

  • RE: Affordable solution for learning and evaluate high-speed ADC (100MSPS)

    Hi Pedro,

    Thank you for posting on EngineerZone.

    What do you think about the AD9635? It is a 12bit 125Msps dual ADC? Its evaluation board uses the HSC-ADC-EVALCZ capture board.

    Thank you.

    Doug

  • Technical documentation of AD9635 eval board

    Hi

    I'm looking for the technical documentation (schematics, layout, user guide, ETC) of the AD9635, Dual, 12 Bits, 80/125MSPS ADC.

    Where can I find it?

    Thanks

    Alon

  • AD9645 Evaluation Board

    Is there an evaluation board for the AD9645?

     

    The evaluation board for the AD9645 actually supports the entire family, which
    ranges from
    80 MSPS to 125 MSPS, and from 12-bit to 14-bit.  The 12-bit pin-compatible
    device is called the…