• AD9634 SDIO pin logic output

    SDIO is input/Output in AD3694 Datasheet (Rev.B).


    There seems to be mentioning only the specification of the input.

    Therefore would you instruct in the specification LOGIC OUTPUTS SDIO, (VOH…

  • Clock for AD9634

    I'm planning to clock AD9634 straight from an FPGA at LVDS18, does anyone see a problem in that? Datasheet mentions "If a low jitter clock source is not available, another option is to ac couple a differential PECL signal to the sample clock", but how…

  • What is the input bias voltage of AD9634 and can it be changed?


    in our use of the AD9634 we've seen that the inputs of the AD9634 draw an input current if they had a common mode voltage of 0.6V instead of the 0.9V given throughout the datasheet and measured at the VCM pin.

    The current drawn from the pins…

  • Please tell me the practicable range of the AD9634 LVDS interface.

    I read AD9634 datasheet.

    In Figure 55. Differential LVDS Sample Clock (Up to 625 MHz), AD9634 is recever and AD9511 driver.

    AD9511 Differential Output Voltage 250mV - 450mV.

    AD9634 Differential clock input 300mV - 3.6V.

    When AD9511 output 250mV, would…

  • How does the HSC_ADC_EVALCZ card interface via J2/J3 with the AD9634 evaluation card via P601/P602.  These connectors are not the same.

    J2/J3 on the HSC-ADC-EVALC card are 40-pin connectors while P601/P602 on the AD9634 eval card are 60-pin.

  • Is there a INL diagram available for the AD9634?

    Since we would like to average repetetive signals we are interested in the Integrated NonLinearity of the AD9634. Is there a diagram available like for the AD9230?

    From the multistage architecture, is it quite repetitive like that of the AD9230 for 2…

  • PN9 testing codes for AD9634

    Hello, everyone!

    I am unable to find seed value for PN9 sequence. ITU-T standard says, that it should be 0x1ff; AN_877 says 0x092. But none of this equals the code that I get from ADC.

    Maybe someone can post the seed value and 3-5 first output words…

  • Bandwidth problem - A9361/AD9364


    I  use AD9361 & AD9634, only for transmission.

    With both components I encountered the following problem:

    Determining tx bandwidth using the appropriate function - does not work.

    I work at a transmission baud rate of 2MS, and I want to set bandwidth…

  • RE: the relationship between the sampling rate and the analog bandwidth of AD9361


    I  use AD9361.

    I also encountered this problem.
    We work at a transmission rate of 2MS,

    but no matter how much I increase the BW (I checked up to 20M)

    I get a bandwidth of 2M,

    I also use AD9634

    We encountered the same problem, where we were able to solve…

  • RE: ADC Latency

    Check out 

    LTC2152-14/LTC2151-14/LTC2150-14 – 4-Bit 250Msps/210Msps/170Msps ADCs (analog.com). 6 clock cycles. 

    AD9634 (Rev. B) (analog.com) 10 clock cycles. 

    keep in mind that both these converters have parallel outputs which will need to be interfaced…