• AD9613 input with different phase

    HI, 

    I am designing ADC board with AD9613, two AD8331s, and AD9523-1 generating 250MHz clock.

    When I try to connect two AD8331s to one AD9613, a connection issue occurred due to pin map during PCB routing.

    Therefore, I wonder whether it is possible to…

  • AD9613: FAQ

    FAQ

  • RE: AD9613 Vcm max. load

    Q 

    Can you tell me the maximum output current and minimum load impedance for the
    AD9613 VCM pin?

     

    A 

    The Vcm pin is capable of roughly driving up to 1.5mA, it is a very low current
    pin. We would recommend only driving an amplifier with the Vcm voltage…

  • AD9613: Usage of pattern 3 and 4

    Q 

    I am not clear on the usage of the registers 0x1D to 0x20 named "User Pattern
    3" and "User Pattern 4". They are not mentioned at all in the technical note
    AN-877, where it is described only the usage of the registers "User Pattern…

  • when ad9613 in Test mode, data from channel A and channel B is the same?

    Hello,

    we use ad9613 in  our board, we have some problems, the data that FPGA receive is not correct.

    we put ad9613 in test mode,  is data from channel A and channel B  the same?

    thank you!

  • RE: AD9613 LVDS and CLK

    Hi Jasonjc,

    1. The min/max input Clock specifications, and corresponding LVDS output timing relationships are presented in AD9613 datasheet Table 4: Switching Specifications, and Figure 2: Interleaved LVDS Mode Data Output Timing Diagram.

    2. I need clarification…

  • Eval-ad9613 sampling clock superimposed on the analog input signal

    We reference the front end design of CN0252 on AD9613 circuits. But it is found that input clock superimposed on the analog signal at the ADC input. Based on sampling results, the superposition signal will affect the sampling accuracy (from gain 0.511…

  • EVAL-AD9613采样时钟叠加到了输入信号

    使用贵司CN0252的前端设计用在AD9613上，测试时在ADC输入端发现时钟叠加到了输入信号上；从采样值上看，该叠加信号会影响采样精度（从增益0.511偏差到0.53左右）。同时使用贵司的EVAL-AD9613评估板测试，J506输入250MHz采样时钟；也能复现该问题，见图示。
    1、请问该现象如何解释？
    2、有无消除该影响并提高测试精度的方案？

  • RE: AD9613-250 Validation of data output patterns

    Hello Jack,

    The AD9613 model differentiations in the Ordering Guide represent the speed grade (170/210/250 Msps) of the model, and whether you want the individual parts delivered in trays, or 7" "RL7" reel qtys.

    All of the speed grade …

  • RE: ad9613采集幅度衰减过大,需要发很大信号才能看到波形

    please re-post in ezone china