• AD9577: Outputs synchronised to reference?

    Hello,

    I have a question regarding the AD9577 clock generator. Can the outputs of the PLLs be synchronised to the reference input? And if so, are there any limitations to be aware of?

    Many thanks, 

    Wouter 

  • RE: Capturing data from ADS7-V2EBZ

    Hi,

     Recently, when I program FPGA  on ACE using  AD6688-3000EBZ with ADS7-V2EBZ, I measure

    the output clk of AD9577 of  ADS7-V2EBZ  with oscilloscope, but sys_clk of AD9577 output  to FPGA  has nothing. but DDR3 clk of  AD9577  output  is 200MHz,80mv peak to…

  • Can not capture data from ADS7-V2EBZ

    Hi,

     Recently, when I program FPGA  on ACE using  AD6688-3000EBZ with ADS7-V2EBZ, I measure

    the output clk of AD9577 of  ADS7-V2EBZ  with oscilloscope, but sys_clk of AD9577 output  to FPGA  has nothing. but DDR3 clk of  AD9577  output  is 200MHz,80mv peak to…

  • EVAL ADI-BERT

    Dear Sir,

    According to the document UG-551, if it's support the output jitters to 0.4 UI while external clock input (@ 8Gbps,40MHz) in mode 5 ?

    Thanks in advance.

  • RE: Clock Generation and Distribution (AD9577)

    Hi Alex,

    1. Can I provide a Sine ref clock to AD9577 or should it be "square wave"?

    It can be a sine wave, but a square wave will deliver better phase noise performance close in. The AD9577 is expecting a 3.3V CMOS square wave.

    1. My ref…
  • RE: AD9577 I2C problem

    The reason for this behavior is that the AD9577 user space registers are write only. There is no associated read back functionality. Therefore, you will be unable to verify the a write via the serial port, only via change in functionality. I realize this…

  • Is it available to use AD9910 as SSCG ?

    Hi

    I have a couple of questions about AD9910 from the customer.
    The customer would like to use AD9910 as Spread Spectrum Clock Generator (SSCG).

    The conditions are followings,
      Center Frequensy = 300MHz
      Spred Percentage = +/-3%
      Modulation Frequency =…

  • AD9577 Channel 2 Power Down Bug?

    Hi,

    I'm using the AD9577 as clock generator and I have been using it for about one week.

    While programming the device through I2C I noticed that when disabling channel 2, writing a 1 to bit6 (PDCH2) of the register DR1 (0x3A) not only I shut down…

  • RE: EVAL-ADN2915 as a PRBS generator?

    Dear Marc,

    Thank you for being interested in ADN2915 and AD9577.

    Yes, you could make one standalone PRBS generator solution.

    In fact, we also provide a product: ADI-BERT. It uses the ADN2915 and AD9577 to implement a standalone PRBS pattern generator…

  • RE: 关于AD9142A的配套模拟器以及选型问题

    AD9142A 的性能更好一些,但是AD9577的系统更简单一些

    如果考虑性能,建议AD9142A+ADL5385