Hi;

The register 0X0304 of AD9557 controls DCO output level, which can be 3-level or 4-level, I hope to know this level means what? Can not find a description in the Datasheet.

THX!

Donald

Can I use AD9558 or AD9558 with gapped clock for asynchronous demapping SDH from OTN?

In order to obtain the results of HOLDOVER SPECIFICATIONS shown in Datasheet table 14., How long the AD9557 needs to operate normally?

Can I use AD9558 or AD9558 with gapped clock for asynchronous demapping SDH from OTN?

I have a relatively slow clock (nominally 9.38MHz) with appreciable cycle-to-cycle jitter which needs to be removed.

It is important, however, that the input-to-output delay (phase) be consistent across power-up/reset cycles.

(i.e. if the delay at one…

Hello,
I have run into an unexpected issue with AD9557 evaluation board. As you can see in the screenshot from the settings, I provide XOA sine wave input of 50 MHz, the reference clock frequency is 80 MHz, and I expect to get 80 MHz on the output as given…

Hello: we plan to recover the clock from the Synchronous Ethernet (SE) using MAX24288, whose output clock jitter is quite bad (a nanosecond!). So we need to clean that clock. Our jitter requirement is pretty modest. A few tens of ps will be perfect. We…

Hello,  Can you help recommend the best part?  

I'm looking for a Clock Generator that can support 128MHz hitless switch-over in a non-SONET application.

The datasheets on AD9557, AD9548, HMC7044, and other parts  do not have much detail on hitless…

Hi,

This is continuing from a previous question about gapped clocks on AD9557 (ad9557 and gapped clock? ), which was replied by pkern.

I am currently working on a clock recovery circuit that should output a phase locked clock. The circuit includes…

Greetings!

To provide some contextual background, I'm looking for a solution to generate clock multiples of the fs laser pulse rate, which can be something close to 80  MHz, in my case 80.11 MHz. During laser operation this frequency constantly changes…