• Question about AD9549 output clk frequency

    Hello,

    My customer use AD9549 and ask some question about AD9549 output clk frequency in their below test result.

    They set AD9549 PLL output with S/R Devider x4, and then test below conditions.

    1) If source is 25MHz, output of AD9549 is exact 100MHz…

  • AD9549 schematic Review

    Hello,

    My customer request their schematic with AD9549.

    Would you check their schematic and let me know  your opinions?

       They use 4 AD9549 and 4 kinds of input clks.

    If you let me know your e-mail, I will send their schematic.

    (My e-mail is a sewoong…

  • RE: AD9549 no PLL lock

    This question has been closed by the EZ team and is assumed answered.
  • RE: Lock time reduction in AD9549

    This question has been assumed as answered either offline via email or with a multi-part answer. This question has now been closed out. If you have an inquiry related to this topic please post a new question in the applicable product forum.

    Thank you,
  • RE: Switch reference clock input of AD9549

    This question has been assumed as answered either offline via email or with a multi-part answer. This question has now been closed out. If you have an inquiry related to this topic please post a new question in the applicable product forum.

    Thank you,
  • AD9549 REFx_IN duty cycle

    HI all,

    What is the duty cycle of REFx_IN @ AD9549?

    It is 45(min), 55(max) % ?

    Or varaety duty cycle is avalable ?

    For example, Hi 10% Low 90% ?

    Best regards,

    sss

  • AD9549 programing sequence

    Hi all.

    My customer ask me about  AD9549 programing sequence.

    His questions are following,

    After setting following sequence A, it hapenns frequently that signal is not output at pin 34,35 and 38.

    【Sequence A】
    1. 0000h 98h write  change to 4-wire serial…

  • AD9547, AD9548, AD9549 EV-Boards

    Hi,

    I have a few questions regarding the AD954x Evaluation boards.

    1. Can the AD9548 EV-board be used to evaluate the performance of the AD9547 provided reference is >1kHz and I/O's are limited to the number available on the AD9547? (We do have a few…

  • What's the best way to connect a 3.3V CMOS clock signal to SYSCLK?

    Concerning the SYSCLK input, I have a single-ended clock signal in CMOS 3.3V
    format and I'd like to know what's the best way to connect this clock to the
    SYSCLK inputs?

     

    SYSCLK accepts 1.8V CMOS single-ended. However, you can setup the…

  • AD9549BCPZ:P CMOS does not have output

    I have AD9549BCPZ, when the part is in open loop, that is, Input the signal
    from FDBK_IN, and observe the signal at HSTL and CMOS, I found HSTL has an
    output, but CMOS hasn't any output.
    My part number is AD9549BCPZ, but the datasheet is for…