• RE: AD9548 1PPS GPS phase unlocked

    I followed these two threads which seams to be similar to my issue with no success,

    AD9548 how to generate a phase alignment clock to PPS 

    AD9548 Self-Disciplined 

    I set the slew rate (0x316/7) with non-zero for at least 1 phase cycle, which is 1 second…

  • RE: AD9548 is identified like AD9547 over USB/I2C with schematic based on PCBZ9548.

    Dmitry,

    The AD9548 and AD9547 differ in their values of R0x002. The AD9548 is 0xC6, whereas the AD9547 is 0xF6.

    One easy workaround to the .STP file problem is to replace "AD9548" with "AD9547" in the .STP file, but I'm still not sure why the software…

  • AD9548 Active mode

    Hello, I have a simple question in understanding an operating modes of AD9548.

    I am working with AD9548/PCBZ. My reference signal is 1 kHz and I have 27 MHz TCXO as XTAL Input.
    System clock rised to 810 Mhz. Output is 62,5 MHz divided to 1 kHz CMOS. 

    When…

  • RE: AD9548 EEPROM write for mass production

    We have worked with BPM Microsystems to add support of programming the AD9548 EEPROM to their programmers. Searching 'AD9548' in their 'Find your device' tool will provide you a list of programmers and sockets that work with the AD9548.…

  • RE: fmcomms1 onboard 50MHz oscillator as clock reference for ad9548

    Hi Haolin,

    You can generate a new AD9548 configuration using the evaluation software (AD9548 Evaluation Board | Analog Devices) created for the EVAL-AD9548 board.

    Regards,

    Dragos

  • AD-FMCOMMS1-EBZ on ZC706, ad9548 not locking to reference

    Hi

    We need to get 2 boards [NOT MIMO, One is TX other RX] either synchronized to single reference or synced to independent 0.5 ppm references.

    However we noticed that even for the default builds (both version 1 HDL and Version 2 HDL) the boards starts…

  • AD9548

    Hi,

    Even I'm facing similar problem.

    I'm currently using an AD9548 with a 10MHz OCXO as an system clock input. The problem I'm having is that the system clock will not remain stable (checking via system clock stability signal on a M pin) with the…

  • RE: How to change FPGA reference clock out   from 30 MHz  to 30.72 MHz  for AD-FMCOMMS1-EBZ

    Arvind,

    In addition to what Istvan already told you to do, you will have to configure the AD9548 accordingly. Unfortunately, this is not possible from the device tree - you will have to update the ad9548_regs[][2] (linux/ad9548.c at xcomm_zynq · analogdevicesinc…

  • AD9548 v AD9518, comparison of phase noise performance

    I would like to know if the AD9548 would improve the phase noise performance in
    comparison with the AD9518 for my application?

     

    The AD9548 (if driven with an 50 MHz crystal on the system clock) may or may
    not have better phase noise…
  • AD9548 SPI problem

    Dear Sir or Madam,

    I have a problem of SPI communication(4-wire) with ARM core processor(Cortex-M3).

    I think my circuit schematic is almost same with AD9548 Evaluation Board's schematic.

    I'm trying to write/read with AD9548's registers.…