• RE: AD9545 question

    Hi,

    I see you send emails about this applications to EZ and also to my colleague. Please use only one channel of communication.

    Yes, you were right. This happens when you deal with multiple people. I did not know the application when I responded first…

  • RE: AD9545. Unstable phase lock.

    Hi,

    I looked over the photos you sent. The 1.5V high level of REFAA seems OK for a dc coupled 1.8V clock. You should also set the validation timer equal to 1s (now it is the default 10ms) , so the REFAA is nonfaulted for 1s before the monitor deems it…

  • Adding AD9545 driver on Petalinux

    Hello ADI

    I want to add AD9545 driver on Petalinux. Is there any HDL file , DTS file available for this device (in the similar way as it is available for ADRV9009, ADRV9008-1 and -2). Requesting you to provide information for the same.

    Regards

    Deepi…

  • RE: AD9545 clock on ADRV9009-ZU11EG SOM

    Hi,

    There have been some changes to the device tree: (check: clk-ad9545.yaml)

    Try changing the PLL node to:

    ad9545_apll1: pll-clk@AD9545_PLL1 {
    	reg = <AD9545_PLL1>;
    	
    	#address-cells = <1>;
    	#size-cells = <0>;
    		
            profile@0 {
            	reg…

  • AD9545 Eval Board with ACE Check State Failing

    Hello,

    When I load up the AD9545 board into the ACE software with a previous saved session, I get a message on the lower left hand side saying that CheckState has failed. The state of the AD9545 in the ACE software also will not update if I click Read…

  • RE: Configuring AD9545

    HI,

    please tell me exactly what input clocks you have and what outputs you need and the phase offsets of the outputs relative to the inputs and I'll create the configuration for you.

    Did you install the evaluation software? This is the tool we have…

  • AD9545 Power supply

    Hi,

    In the AD9545 Evaluation board schematic, all the VDD power supply pins are isolated using 0E. Attached is the evaluation board schematic.Please let us know is there any specific reason to isolate individual VDD pins or all of them can be shorted…

  • RE: Is this a bug in AD9545 EEPROM controller ?

    HI,

     In the cso file that is created using the AD9545 evaluation software, there are 21 registers listed starting at address 0x2000. Yet, the list I gave you in your previous query (https://ez.analog.com/clock_and_timing/f/q-a/541482/each-time-when-the…

  • RE: AD9545 0x000F bit 0 issue

    HI,

    sorry for getting back to you late. I had to go in the lab to play with the AD9545 in order to respond to you. There is no need to send twice the same email.

    As you know, the AD9545 registers are live and buffered. The key point of the buffered registers…

  • RE: System clock compensation of AD9545 using self-developed software

    Hi, Petre

    Thanks for your reply!

    Our primary problem is that the OCXO stability performance can not meet the holdover requirement(±1.5us drift in 24 hours). So we want to add some compensation algorithm through AD9545.

    Secondly, the phase noise…