• AD9528 setting on AD9528 EVB

    Hi all,

    My customer wants to use AD9528 as shown in the attached image.

    When the customer tested the setting on the AD9528 EVB, the PLL2 of AD9528 was unlocked.

    The customer replaced only the VCXO clock of EVB(122.88M) with the wanted frequency(156…

  • RE: ad9528 frequency offset

    If your devices are not frequency locked they will have drift differences. This is where the 50ppm number comes into play, and scales with frequency.

    There is no way to "fix" this issue as oscillators will naturally have differences based on their specifications…

  • RE: ad9528 reference clock issue

    AD9528 can generate integer multiple of the reference input frequency (122.89 MHz) here in your case and the dev. clk out would be 245.78MHz (20kHz offset). You need to use the use cases that are listed in the GUI and as per those input rates/ frequencies…

  • AD9528 Status Monitor PLL1

    I have noticed a difference between the status monitor register 0x0505 and status register 0x0508 - PLL 1 status

    We have a potential issue with PLL1 when running from a cpri reference.  I have noticed that the PLL1 status indicated in 0x0508 indicates…

  • AD9528

    用单片机配置的AD9528,现在已经能读出ID号,并且AD9528的0x00~0x0F寄存器读写都没有问题,但是从0x100寄存器开始,后面的寄存器只能读,无法写入,硬件上以及证明没有问题,现在不知道是什么原因,0x0100后的寄存器都写入不了,大家有遇到过这个问题吗?是哪个寄存器没有配置吗?谢谢啦

  • AD9528

    In our application the AD9528 drives a ADRV9009 and we use REFA with a local TCXO and REFB is an even higher precision reference from a cipri card.  We power up on REFA and then after power up but before running in normal operation we switch over from…

  • AD9528

    How can I simulate the filter parameters of the LF1 and LF2_CAP?

  • AD9528 input reference clock changing to RefB.

    Hi,

    We were configuring the AD9528 with input Ref clock REFA  and VCXO .The configuration was successful. Now we want to change the input Ref clock to REFB instead of REFA, for this I have changed registers

    0x0108 from value 0x2a to 0x52

    0x010a from value…

  • Synchronising Two AD9528s

    Hi,

    I need to connect multiple ADRV9026s and a BBU such that I will exceed the 14 outputs of the AD9528 for my DEV CLK and SYSREFs.

    I have seen on the AD9528 datasheet and on some threads in EngineerZone that a second AD9528 can be used as a buffer or…

  • RE: AD9528 PLL1 Feedback source

    Hi,

    this is a general question that is difficult to offer a comprehensive answer. If you tell me what in the end you want to accomplish, I may provide better insights.

    I believe the answer depends on the value of R1, the divider of the VCXO into the PLL2…