• AD9520-3 EEPROM settings aren't loaded

    We are using an AD9520-3 Clock generator in one of our designs, but
    unfortunately we are experiencing some problemen with respect to the loading of
    the eeprom settings, stored inside the AD9520's eeprom memory.

    We have pulled the eeprom…

  • AD9520-1 Programming

    I am using an AD9520-1 Clock generator in my design, but unfortunately I am experiencing some problem with respect to the loading of the EEPROM settings, stored inside the AD9520's EEPROM memory. If EEPROM loaded correctly everything works fine, but sometimes…

  • AD9520-3 Phase Noise, Simulation vs Measurements


    I am using AD9520-3 for clock generation on my custom board. Input reference clock is 10MHz OXCO output with -155dBc/Hz phase noise (PN) at 10KHz offset. I am setting AD9520-3 VCO to 1800MHz and divide by 2 to get 900MHz provided to channels. I…

  • AD9520-3的输入参考时钟,单端150mV VPP是否可以

    目前我们使用AD9520-3作为AD9467的时钟,采用外时钟10MHz作为9520 ref2的单端输入。

    我们发现,当10MHz 为500mV VPP输入时,我们的采集信号在中心点有鼓包,当10MHz我们衰减到150mV VPP时,中心点鼓包会更大。

    问题:9520 差分输入配置未单端输入时,其最小输入摆幅是多少。前端是否可以加芯片,去识别更小摆幅的信号,能帮忙推荐一下么。

  • what does the "-3" on the brand of ADV7390/1/2/3 and ADV7340/1/2/3 indicate?

    The latest revision of the encoder has the -3 version branded on it's package. The revision code of the encoder can be read back from register 0xBB bits 7:6. 01B indicates the latest revision.

    Further information on the change made to this version…

  • RE: Some questions about using AD9520


    sorry for the delay in getting back to you. We were in shutdown for the winter holidays.

    Could you please send me the schematic of the AD9520-3 board? I want to make sure you copied the evaluation board schematic on the required external circuitry…

  • Differences Between LTC4267IGN, LTC4267IGN-3 and LTC4267CGN-3

    Hello Guys,

    I want to know the diference between the LTC4267IGN, LTC4267IGN-3 and LTC4267CGN-3.

    They are direct substitutes?

    If not, what is the main difference between each one?


  • Some questions about AD9520 PLL locking

    Hello,I have some questions about using  AD9520 PLL.

    I make a board of AD9520-3 .The REFCLK is 25MHz.The configuration of the PLLare shown below: R=100; N=8000; charge pump is 4.8mA.I design the PLL loop filter by ADIsimCLK as so:


    I want the output signal…