• AD9518 Calibration


    I’m using an AD9518-0 on my electronics board and now I’m facing some trouble to get the card “ready to serve” after an electrical reboot. In the FPGA connected to the AD9518-o(via SPI), I’m programming all the required settings right after the…

  • AD9518 Sync

    I Have two Ad9518's in different slots of my system that have the same 10mhz input clock in common. Both AD9518's are also configured to generate a 400Mhz clock on output 0&1. I'm trying to figure out how to phase align the outputs and I figured that…

  • AD9518-1 Pinout

    The OrCAD Capture CIS symbol created by UltraLibrarian from AD9518-1ABCPZ.bxl has the inverting and non-inverting pins of output channels 0, 1, 2, and 3 opposite from what is show in the AD9518-1 datasheet. Can it be assumed that the datasheet is correct…

  • RE: Timing parameter tc of Serial Control Port for AD9518-3

    Thank you for your reply.
    From Figure 51, I have thought that AD9518-3 samples on the rising edge of the SCLK.

    Is it true that AD9518-3 samples them on the negative edge of the SCLK.
    Thanks and Regards

  • AD9518-1 no output


    we design a system with ad9518-1, but AD9518-1 pin outputs DC 1.6V, and the complement pin output DC 2.4V,  no clock output, why?

    Thank you!

  • [EVAL] AD9518-3A/PCBZ board size


    Do you have AD9518-3A/PCBZ board size information?

    It is listed as EVAL product for AD9518-3.

    Thank you for your help as always.

    Best regards,


  • AD9518-1 - Script with registers settings

    Dear supported

    My customer is using the AD9518-1.


    Required Fout= 122.88Mhz on out4 (780mv) . The external Reference clk on REF1 is 25Mhz.


    Currently it seems like the PLL is not working,


    1. 1.      We get ~1.2Ghz from VCO + clocks on output0…
  • AD9548 v AD9518, comparison of phase noise performance

    I would like to know if the AD9548 would improve the phase noise performance in
    comparison with the AD9518 for my application?


    The AD9548 (if driven with an 50 MHz crystal on the system clock) may or may
    not have better phase noise…
  • AD9518 VCO偶数分频失锁





  • RE: AD9518-3, Phase noise due to two Ref clocks.

    Hi Paul,

    Thanks for the reply.

    Are you saying that applying 2 reference clocks to the AD9518 produces no excess phase noise

    on a "perfect" PCB?

    The clocks are widely separated until they meet at the chip. Note that REF1 and REF2 are *adjacent…