I used the Evaluation Board AD9518-0 the principle circuit, I want to produce a two-way 600MHz clock signal.
The circuit board is designed based on evaluation board.
The absence of the firmware, I the AD9549 firmware.
Through several tests to find…
hi,Thank you.
I have modified loop bandwidth 75KHz for AD9518-1 and output signal can be locked.using ADISimclk ,loop bandwidth 50Khz for AD9518-0 ,its output signal can be locked,also .
The OrCAD Capture CIS symbol created by UltraLibrarian from AD9518-1ABCPZ.bxl has the inverting and non-inverting pins of output channels 0, 1, 2, and 3 opposite from what is show in the AD9518-1 datasheet. Can it be assumed that the datasheet is correct…
Hi Meir,
We have the AD9553 digital PLL which is a three input, two output device.
http://www.analog.com/en/clock-and-timing/clock-generation-and-distribution/ad9553/products/product.html
An analog PLL like the AD9518 would work but it has 5 extra…
Hello,
Do you have AD9518-3A/PCBZ board size information?
It is listed as EVAL product for AD9518-3.
Thank you for your help as always.
Best regards,
Sofy
we design a system with ad9518-1, but AD9518-1 pin outputs DC 1.6V, and the complement pin output DC 2.4V, no clock output, why?
Thank you!
I Have two Ad9518's in different slots of my system that have the same 10mhz input clock in common. Both AD9518's are also configured to generate a 400Mhz clock on output 0&1. I'm trying to figure out how to phase align the outputs and I figured that…
I’m using an AD9518-0 on my electronics board and now I’m facing some trouble to get the card “ready to serve” after an electrical reboot. In the FPGA connected to the AD9518-o(via SPI), I’m programming all the required settings right after the…
Hi Donald,
The VS pins power the rest of the circuitry within the part with exception to the charge pump which is supplied by the VCP pin and the VS_LVPECL pins which power the output drivers. The current that the VS pins consume can be calculated by…