Hi,
Have you used the evaluation software to configure the evaluation board?
http://www.analog.com/en/clock-and-timing/clock-generation-and-distribution/ad9518-0/products/EVAL-AD9518-0/eb.html
If you tell us how you intend to use the part we can help…
Hello,
I’m using an AD9518-0 on my electronics board and now I’m facing some trouble to get the card “ready to serve” after an electrical reboot. In the FPGA connected to the AD9518-o(via SPI), I’m programming all the required settings right after the…
I Have two Ad9518's in different slots of my system that have the same 10mhz input clock in common. Both AD9518's are also configured to generate a 400Mhz clock on output 0&1. I'm trying to figure out how to phase align the outputs and I figured that…
The OrCAD Capture CIS symbol created by UltraLibrarian from AD9518-1ABCPZ.bxl has the inverting and non-inverting pins of output channels 0, 1, 2, and 3 opposite from what is show in the AD9518-1 datasheet. Can it be assumed that the datasheet is correct…
we design a system with ad9518-1, but AD9518-1 pin outputs DC 1.6V, and the complement pin output DC 2.4V, no clock output, why?
Thank you!
Do you have AD9518-3A/PCBZ board size information?
It is listed as EVAL product for AD9518-3.
Thank you for your help as always.
Best regards,
Sofy
Dear supported
My customer is using the AD9518-1.
Required Fout= 122.88Mhz on out4 (780mv) . The external Reference clk on REF1 is 25Mhz.
Currently it seems like the PLL is not working,
hi,Thank you.
I have modified loop bandwidth 75KHz for AD9518-1 and output signal can be locked.using ADISimclk ,loop bandwidth 50Khz for AD9518-0 ,its output signal can be locked,also .
ad9518-4,改芯片用过好多次,这次应用不同需要输出800MHz。发现如下问题:
将VCO的分频设置0x1e0到偶数分频(2、4)都不能锁定。其他设置不变,设置成奇数分频就没有锁不定的问题;
观察输出800MHz信号,不是一点没有,频谱在800MHz上闪烁,时域波形800MHz时有时无;
偶数分频时,有什么忌讳吗,请各位专家帮忙解答一下。谢谢!