when i configration the AD9517-2,my configration is display as bellow;(use REF2 as reference clock,use the intener VCO);
配置AD9517-2寄存器时,配置如下(使用REF2作为参考时钟,使用内部VCO);output 4 output6都无输出,谁帮忙解答一下,感激不尽!
Hi everyone,
I am trying to use a "AD9517/PCBZ (Rev B)" evaluation board to drive an AD9517-0 installed in another board designed by us.
The intention is to use the "AD9516/17/18 Evaluation Software, Version 1.1.0" to control/program the AD9517…
Hi Oliver,
It's a bit unusual ...
The way to fully configure the AD9517 works via a firmware (.stp) file.
You can create it using the Evaluation Software -
http://www.analog.com/en/design-center/evaluation-hardware-and-software/evaluation-boards…
Hi Team,
We are using AD9517-3 part in one of our project to generate ADC sampling clock input.
Used 10 MHz single ended LVCMOS as reference input to clock generator, programmed SPI registers to enable internal PLL and VCO to obtain the 500 MHZ output…
I am using AD9467-FMC-250EBZ on Zedboard with an external clock. I want to use the internal clock generator chip AD9517 having phase-locked loop (PLL) to multiply (x4) the externally provided clock (~50 MHz). I can see in the datasheet of AD9517 that there…
Hi, My name is Haichuan LIN.
I have already read about the AD9517-3 data sheet. And there is
no information whether AD9517-3 clock input accepts sine wave.
In data sheet, AD9517-3 clock input accept 150mVpp(1V/ns is prefered).
Here, I want to make…
Dear Sir/Madam,
AD9517-3 on-chip VCO frequency range is 1.75GHz-2.25GHz, but the manual's Table 28. showoing using a 10 MHz Reference Input to Generate Different VCO frequency less than 100MHz, is this conflict with teh VCO's frequency range 1.75GHz…
I am using the AD9517 on two boards, and i am trying to synchronize all outputs such that the phase/timing between outputs on both board are repeatable at every power-up or reset cycle.
I have made all the necessary provisions:
1. External 10MHz reference…
您好,
我们在使用AD9517-3的过程中发现OUT0 OUT1没有时钟信号输出,只输出一个大概2V的高电平,OUT2 OUT3有时钟信号输出,OUT0/OUT1OUT2/OUT3的输出频率都是设置为120MHz,LVPECL输出电压设置为780mV(默认值),使用交流耦合。请问是怎么回事?
OUT4 OUT5 OUT6 OUT7都有时钟信号输出。