• The amplitude of output 500m waveform of ad9516-4 is far less than 340mv

    Hello, my circuit board uses 7 channels of ad9516-4 to output LVDS differential sampling clock, and plans to output LVDS clock frequency of 500MHz. The input clock pin of ad9516 is refin1 (64) and refin2 (63), and the input clock is LVDS clock generated…

  • ad9516

    I have two ad9516 evaluation boards, one is ad9516-1, the other is ad9516-5. When I used it, I found that the LD light on the ad9516-1 evaluation board could be normally lit after downloading the same program, but the LD light on ad9516-5 couldn't be…

  • ad9516

    1. May I ask whether the sma interface of CLK on ad9516 evaluation board can only be used to access the output of external VCO?

    2. I want to connect a 150MHZ clock to the ad9516 evaluation board, but it reminds me that it is beyond the scope of the PFD…

  • RE: AD9516-4 eval board holdover not working

    I have verified that the holdover works in manual mode by using the S5 switch on the evaluation board, but I am not able to use it in automatic mode. I have a doubt: is the automatic holdover mode only designed to switch to REF2? Or is it just possible…

  • RE: AD9516-4使用问题

    参考在status上的信号请用示波器观测,也可以尝试以下差分输入方式。最简单的检测方法,是否可以在Status引脚上看到High 或者LOW 当编程为VDD,  或者GND时。

  • RE: 签个到,送您好礼啦!(获奖名单已公布)

    西安,韦曲西街,我做信号处理板,关注AD9516-4

  • AD9516-4芯片发烫,消耗电流300mA

    你好,ADI工程师,我现在在做AD采集卡,时钟芯片用的是AD9516-4,产生100M的时钟给AD9233;现在调试PCB板;我先焊接好FPGA最小系统,调试好FPGA模块后,再焊接AD9516-4芯片及外围电路;发现上电后,PCB板消耗电流356mA,其中56mA电流为FPGA系统消耗的,AD9516-4系统消耗电流大概有300mA,这部正常,芯片也比较烫;我把AD9516-4的系统图发上,麻烦帮我分析下;我怀疑问题是出在AD9516-4的热焊盘上;由于手工焊接,AD9516-4背部的热焊盘没有用焊锡与PCB的焊盘焊接…

  • AD9516-4芯片发烫,消耗电流300mA

    你好,ADI工程师,我现在在做AD采集卡,时钟芯片用的是AD9516-4,产生100M的时钟给AD9233;现在调试PCB板;我先焊接好FPGA最小系统,调试好FPGA模块后,再焊接AD9516-4芯片及外围电路;发现上电后,PCB板消耗电流356mA,其中56mA电流为FPGA系统消耗的,AD9516-4系统消耗电流大概有300mA,这部正常,芯片也比较烫;我把AD9516-4的系统图发上,麻烦帮我分析下;我怀疑问题是出在AD9516-4的热焊盘上;由于手工焊接,AD9516-4背部的热焊盘没有用焊锡与PCB的焊盘焊接…

  • RE: AD9136 jesd setup in Linux

    Hi Dragos,

    yes, here is a sample of my devicetree.

    / {
            clocks {
                    ad9516_clkin: refclk {
                            compatible = "fixed-clock";
    
                            clock-frequency = <1474560000>;
                            clock…

  • RE: How to align (synchronize) the outputs of two AD9516-1

    Hi,

    the problem you have is outlined in the data sheet, page 46: "there is an uncertainty of up to one cycle of the clock at the input to the channel divider due to asynchronous nature of SYSC signal with respect to the clock edges inside the AD9516"…